Patents by Inventor Richard J Proctor
Richard J Proctor has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7180897Abstract: A telecommunications system comprising one or more cross-connects and a plurality of telephone exchanges wherein two or more of the telephone exchanges are arranged to communicate with each other via the one or more routers and an adapter for providing the telephone exchanges with a means of inter-communication via the one or more routers wherein the adapter converts traffic between packetised and non-packetised form.Type: GrantFiled: November 2, 1999Date of Patent: February 20, 2007Assignee: Ericsson ABInventor: Richard J Proctor
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Patent number: 7050442Abstract: A communications system comprising device (e.g. an ATM physical layer (PHY)) and higher layer devices (e.g. an ATM layer and an AAL2 layer) are connected via a bus for communication of traffic therebetween, the bus comprising lines for carrying data and control signals. The bus supports data in ATM and AAL2 form and the devices discriminate between the two forms of data traffic. The data in AAL2 form typically comprises AAL2 mini-cells associated with identification of the source of destination of the mini-cells.Type: GrantFiled: April 18, 2000Date of Patent: May 23, 2006Assignee: Marconi UK Intellectual Property Ltd.Inventor: Richard J Proctor
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Patent number: 6700885Abstract: A telecommunications system comprising one or more cross-connects and a plurality of telephone exchanges. Two or more of the telephone exchanges are arranged to communicate with each other via the one or more cross-connects. An adapter provides the telephone exchanges with inter-communication via the one or more cross-connects. The adapter converts traffic between packetized and non-packetized form.Type: GrantFiled: February 16, 1999Date of Patent: March 2, 2004Assignee: Marconi Communications LimitedInventors: Richard J Proctor, Thomas S Madden
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Publication number: 20040028050Abstract: A partitioned switch comprising a plurality of switch partitions in which at least some of the partitions comprise one or more physical ports, in which the partitioned switch comprises means for establishing a connection for communication of data between a first physical port on a first partition and a second physical port on a second partition; in which the connection is effected completely internal to the switch. The communication between the physical ports is established by means of a series of consecutive virtual connections through the switch. The partitioned switch also comprises means for monitoring data input at the first physical port for transport via the physical connection to the second physical port and generating statistics relating to the equivalent data traffic associated with one or more of the virtual ports used to set up the physical connection.Type: ApplicationFiled: September 2, 2003Publication date: February 12, 2004Inventor: Richard J. Proctor
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Patent number: 6480608Abstract: In an Asynchronous Transfer Mode telecommunications network having a plurality of virtual paths or circuits, an encryption key used for data transmitted between a source and a receiver may be updated, the data being transmitted initially using a first encryption key by a first of the plurality of virtual paths or circuits, by a connection being estabished by a second of the plurality of virtual paths or circuits and sending a second encryption key by that connection from the source to the receiver and subsequently transmitting the data using the second encryption key by the second of the plurality of virtual paths or circuits.Type: GrantFiled: April 23, 1998Date of Patent: November 12, 2002Assignee: Marconi Communications LimitedInventor: Richard J Proctor
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Patent number: 6426964Abstract: A higher data rate signal such as ATM (Asinchronous Transfer Mode) fixed size data packets and lower data rate signals such as ISDN are transmitted along the same link by accommodating the ISDN in unused time slots in the overall frame structure. The cells also contain a fiel containing incremented numbers of modulo-n and, in the reverse direction along the link, frames are transmitted which acknowledge receipt of those sequence numbers. If the next expected number is not received, the sequence transmitted is restarted at the number.Type: GrantFiled: November 14, 1997Date of Patent: July 30, 2002Assignee: Marconi Communications LimitedInventor: Richard J Proctor
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Publication number: 20010040967Abstract: In an Asynchronous Transfer Mode telecommunications network having a plurality of virtual paths or circuits, an encryption key used for data transmitted between a source and a receiver may be updated, the data being transmitted initially using a first encryption key by a first of the plurality of virtual paths or circuits, by a connection being estabished by a second of the plurality of virtual paths or circuits and sending a second encryption key by that connection from the source to the receiver and subsequently transmitting the data using the second encryption key by the second of the plurality of virtual paths or circuits.Type: ApplicationFiled: April 23, 1998Publication date: November 15, 2001Inventor: RICHARD J PROCTOR
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Patent number: 6271951Abstract: An optical communications network comprising a Head End Unit connected to a plurality of groups of Network Termination Equipments (NTE) and/or Optical Network Units (ONU), wherein downstream communication is by Time Division Multiplex, wherein a group is multiplexed onto a stream and a plurality of streams are combined into a higher speed multiplex and upstream communication is by Time Division Multiplex Access is characterized by enabling the NTE's or ONU's to negotiate bandwidth in respect of low level upstream traffic and by pre-allocating bandwidth to individual NTE's or ONU's in respect of high level upstream traffic.Type: GrantFiled: August 4, 1997Date of Patent: August 7, 2001Assignee: Marconi Communications LimitedInventor: Richard J Proctor
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Patent number: 6185225Abstract: A copper wire pair linking network terminating equipment in a home with a relatively localized multiplexer, e.g., in a street cabinet, carring high data rate, e.g., VDSL, signals such as ATM and ISDN, combined at the multiplexer. It is necessary for the multiplexer to be provided with a power supply but, in the event of failure of the power supply, VDSL signals could not be generated in the multiplexer. To provide some fall-back in such a case, a metal link from the local exchange to the network terminating equipment is formed, for example, by using relays, thereby permitting ISDN signals to be received in the home even though the higher data rate ATM has now failed.Type: GrantFiled: November 12, 1997Date of Patent: February 6, 2001Assignee: Marconi Communications LimitedInventor: Richard J Proctor
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Patent number: 5544168Abstract: An ATM telecommunications switch includes a plurality of parallel data switching planes and a parallel control plane, each plane having an equal number of input ports and output ports and a central switching unit to switch each input port to any output port. A single data stream is divided between a plurality of input ports and the data is concatenated from a plurality of output ports to reconstitute the data stream. A first rotator connects each input port cyclically to each timelslot of the central switching unit and a second rotator connects each timeslot of the central switching unit cyclically to each output port.Type: GrantFiled: August 17, 1994Date of Patent: August 6, 1996Assignee: GPT LimitedInventors: Mark T. Jeffrey, Thomas S. Maddern, Richard J. Proctor
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Patent number: 5528406Abstract: A telecommunications switching device includes a plurality of ports and a plurality of switching units and a connecting circuit for connecting each of the ports to each of the switching units in turn. The connecting circuit includes a photonic channel separation circuit and a photonic space switching circuit.Type: GrantFiled: August 24, 1995Date of Patent: June 18, 1996Assignee: GPT LimitedInventors: Mark T. Jeffrey, Richard J. Proctor, Peter J. Duthie
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Patent number: 5459724Abstract: An ATM telecommunications switch includes a plurality of parallel data switching planes and a parallel control plane, each plane having an equal number of input ports and output ports and a central switching unit to switch each input port to any output port. Data from a single timeslot on the central switching unit is connected to a plurality of output ports in a point to multipoint operation. A multipoint memory stores information regarding the data addresses and a forward transfer store provides additional storage for multipoint cells.Type: GrantFiled: May 20, 1993Date of Patent: October 17, 1995Assignee: GPT LimitedInventors: Mark T. Jeffrey, Thomas S. Maddern, Richard J. Proctor
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Patent number: 5303232Abstract: The invention concerns an Asynchronous Transfer Mode Switch having a plurality of input stages (IS1 . . . 1SN) each for receiving a digital data transmission stream (DS1 . . . 256) consisting of a series of cells and wherein each input stage of the switch includes a circuit (52) for determining the destination of the cells of that data stream, and a circuit (63) for disassembling each cell into cell elements and for allocating to each cell element routing data to enable it to be routed across the central stages.Type: GrantFiled: April 3, 1991Date of Patent: April 12, 1994Assignee: GPT LimitedInventors: Richard J. Proctor, Thomas S. Maddern, Mark T. Jeffrey, Alexander Philip
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Patent number: 5271004Abstract: An asynchronous transfer mode switching arrangement includes a serial to parallel converter arranged to receive input packets of data, which include routing information, in serial form and convert the packets of data to parallel form. A first random access memory is provided in which each packet of data is entered at an addressed location into the memory, and the address is entered in a respective first-in first-out output queue at the tail. The address at the head of the queue is accessed and the packet of data is read from the first random access memory into a parallel to serial converter and the packet of data is serially delivered to the associated output. The first random access memory and the output queues are controlled by a memory management arrangement to which is connected a broadcast channel routine second random access memory.Type: GrantFiled: August 27, 1991Date of Patent: December 14, 1993Assignee: GPT LimitedInventors: Richard J. Proctor, Thomas S. Maddern
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Patent number: 5123021Abstract: A telecommunication apparatus in which data messages are routed across a switch, each message comprising a message portion and an incoming message identity portion, includes circuitry for generating from the incoming message identity portion an outgoing message identity portion, a switching circuit for utilizing the incoming and outgoing message identity portions to route the message to an output port, circuitry for utilizing the outgoing message identity portion to generate a further message identity portion, and comparator circuitry for comparing the incoming and further message identity portions to detect faults.Type: GrantFiled: August 16, 1990Date of Patent: June 16, 1992Assignee: GEC Plessey Telecommunications LimitedInventors: Richard J. Proctor, Geoffrey Chopping, Thomas S. Maddern
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Patent number: 5109378Abstract: An asynchronous time division (ATD) switch for carrying out packet switching. In one embodiment a switch has 256 ports running at 155 M bits and is capable of switching incoming data cells at each of the input ports to any one of 256 output ports. At each input port a switch sequentially distributes the received data cells over 16 outputs each of which is connected to a different DMR circuit. There are 256 DMR circuits each having 16 inputs and 16 outputs. A DMR circuit is a fixed space switching device which has N inputs, N time intervals and N outputs and operates cyclically so that each input goes to each output for 1/Nth of the time. The inner stage of the ATD switch comprises 256 central switches each having 16 inputs and 16 outputs. Each central stage switch has its 16 inputs connected to 16 different DMR circuits. The fourth stage of the switch consists of another array of 256 output DMR circuits with each central switch being connected to 16 different output DMR circuits.Type: GrantFiled: October 12, 1989Date of Patent: April 28, 1992Assignee: Gec Plessey Telecommunications LimitedInventors: Richard J. Proctor, Thomas S. Maddern, Alexander S. Philip
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Patent number: 5042038Abstract: A data pathchecking system for resolving data transfer errors in a plane of directly connected switching elements, the system checking the plane of directly connected switching elements by designating one switching element with an associated control element as a master and other switching elements and associated control elements as slaves. The master switch element instructs other switch elements discretely to check their respective switching element for data transfer errors and checks its own switching element for data transfer errors. Furthermore, the master switch is arranged to validate connections between switching elements.Type: GrantFiled: April 17, 1989Date of Patent: August 20, 1991Assignee: Plessey Overseas LimitedInventors: Richard J. Proctor, Thomas S. Maddern
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Patent number: 4905223Abstract: A wideband/multislot switching arrangement is provided for use in a digital telecommunications exchange. A call handling device is provided which receives signalling information about a path connection, and which communicates with a switch interface to generate a single switch request. The switch interface includes a map record of each circuit connection controlled by the call handling device and generates multiple switch requests which are used to control a number of switches to make the path connections.Type: GrantFiled: February 16, 1988Date of Patent: February 27, 1990Assignee: The Plessey Company plcInventors: Richard J. Proctor, Thomas S. Maddern