Patents by Inventor Richard J. Saye

Richard J. Saye has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10840171
    Abstract: A packaged semiconductor device includes a semiconductor die mounted on a leadframe, a housing for the semiconductor die defining a horizontal plane and a horizontal direction. The leadframe includes leads each having an inner lead portion inside the housing and an outer lead portion that includes a first portion that extends out in the horizontal direction from one of the sidewalls of the housing, a transition portion that includes a vertical direction component, and a distal end portion, wherein the distal end portion of the leads are all on the horizontal plane. The outer lead portions alternate between a gull wing lead shape having the distal end portions extending in the horizontal direction outward from the housing and inward extending leads that have their distal end portions extending in the horizontal direction inward toward the housing. The leadframe consists of a single leadframe.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: November 17, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Michael L. Meyers, Scott F. Eisenhart, Richard J. Saye, Sreenivasan K. Koduri
  • Publication number: 20200168531
    Abstract: A packaged semiconductor device includes a semiconductor die mounted on a leadframe, a housing for the semiconductor die defining a horizontal plane and a horizontal direction. The leadframe includes leads each having an inner lead portion inside the housing and an outer lead portion that includes a first portion that extends out in the horizontal direction from one of the sidewalls of the housing, a transition portion that includes a vertical direction component, and a distal end portion, wherein the distal end portion of the leads are all on the horizontal plane. The outer lead portions alternate between a gull wing lead shape having the distal end portions extending in the horizontal direction outward from the housing and inward extending leads that have their distal end portions extending in the horizontal direction inward toward the housing. The leadframe consists of a single leadframe.
    Type: Application
    Filed: November 28, 2018
    Publication date: May 28, 2020
    Inventors: MICHAEL L. MEYERS, SCOTT F. EISENHART, RICHARD J. SAYE, SREENIVASAN K. KODURI
  • Publication number: 20160268023
    Abstract: A transfer mold compound mixture for use in a transfer mold device to encapsulate electronic components. A ferromagnetic material is mixed into a mold compound to produce a mixed mold compound having an increased permeability over the mold compound.
    Type: Application
    Filed: May 26, 2016
    Publication date: September 15, 2016
    Inventors: Steven Kummerl, Richard J. Saye
  • Patent number: 9378882
    Abstract: Circuits and methods of fabricating circuits are disclosed herein. A method of fabricating an electronic circuit includes placing an electronic component on a substrate. A ferromagnetic material is mixed into a mold compound to produce a mixed mold compound having an increased permeability over the mold compound. The mixed mold compound is applied to the substrate by way of a transfer mold process, wherein the mixed mold compound encapsulates the electronic component.
    Type: Grant
    Filed: December 16, 2011
    Date of Patent: June 28, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Steven Kummerl, Richard J. Saye
  • Patent number: 9177945
    Abstract: Fabricating a packaged semiconductor device provides first planar leadframe with first leads and pads having attached electronic components. The first leadframe has a set of elongated leads bent at an angle away from the plane of the first leadframe. A second planar leadframe has second leads having attached electronic components. The bent leads of the first leadframe conductively connected to the second leadframe, forming a conductively linked 3-dimensional network between components and leads in two planes.
    Type: Grant
    Filed: December 17, 2014
    Date of Patent: November 3, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Richard J. Saye
  • Publication number: 20150099329
    Abstract: Fabricating a packaged semiconductor device provides first planar leadframe with first leads and pads having attached electronic components. The first leadframe has a set of elongated leads bent at an angle away from the plane of the first leadframe. A second planar leadframe has second leads having attached electronic components. The bent leads of the first leadframe conductively connected to the second leadframe, forming a conductively linked 3-dimensional network between components and leads in two planes.
    Type: Application
    Filed: December 17, 2014
    Publication date: April 9, 2015
    Inventor: Richard J. Saye
  • Patent number: 8946880
    Abstract: A semiconductor system (100) has a first planar leadframe (101) with first leads (102) and pads (103) having attached electronic components (120), the first leadframe including a set of elongated leads (104) bent at an angle away from the plane of the first leadframe; a second planar leadframe (110) with second leads (112) and pads (113) having attached electronic components (114); the bent leads of the first leadframe conductively connected to the second leadframe, forming a conductively linked 3-dimensional network between components and leads in two planes; and packaging material (140) encapsulating the 3-dimensional network.
    Type: Grant
    Filed: March 22, 2013
    Date of Patent: February 3, 2015
    Assignee: Texas Instruments Incorporated
    Inventor: Richard J. Saye
  • Publication number: 20130249051
    Abstract: A semiconductor system (100) has a first planar leadframe (101) with first leads (102) and pads (103) having attached electronic components (120), the first leadframe including a set of elongated leads (104) bent at an angle away from the plane of the first leadframe; a second planar leadframe (110) with second leads (112) and pads (113) having attached electronic components (114); the bent leads of the first leadframe conductively connected to the second leadframe, forming a conductively linked 3-dimensional network between components and leads in two planes; and packaging material (140) encapsulating the 3-dimensional network.
    Type: Application
    Filed: March 22, 2013
    Publication date: September 26, 2013
    Inventor: Richard J. Saye
  • Publication number: 20130154148
    Abstract: Circuits and methods of fabricating circuits are disclosed herein. A method of fabricating an electronic circuit includes placing an electronic component on a substrate. A ferromagnetic material is mixed into a mold compound to produce a mixed mold compound having an increased permeability over the mold compound. The mixed mold compound is applied to the substrate by way of a transfer mold process, wherein the mixed mold compound encapsulates the electronic component.
    Type: Application
    Filed: December 16, 2011
    Publication date: June 20, 2013
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Steven Kummerl, Richard J. Saye