Abstract: An improved current switch circuit having an active load. The active load comprises a current source at the collectors of the switch transistors which generates a current which is less than the current generated by the current source at the emitters of the switch transistors. The active load also includes both means for supplying the current difference between said source currents as supplementary current to the emitter current source when the associated switch transistors are conductive as well as means for diverting the source current at the collectors of the switch transistors when they are non-conductive.Depending on the current generated by the current sources, the performance of the circuit can be selected to optimize power dissipation versus switching speed. The circuit utilizes a minimum number resistors, thereby using a minimum amount of semiconductor area and insuring lower power dissipation than is available with prior art circuits.