Abstract: Communication latency, now a dominant factor in computer performance, makes physical size, density, and interconnect proximity crucial system design considerations. The present invention addresses consequential supercomputing hardware challenges: spatial packing, communication topology, and thermal management. A massively-parallel computer with dense, spherically framed, geodesic processor arrangement is described. As a mimic of the problem domain, it is particularly apt for climate modelling. However, the invention's methods scale well, are largely independent of processor technology, and apply to a wide range of computing tasks. The computer's interconnect features globally short, highly regular, and tightly matched distances. Communication modes supported include neighbour-to-neighbour messaging on a spherical-shell lattice, and a radial network for system-synchronous clocking, broadcast, packet-switched networking, and IO.

Abstract: A method and apparatus are used for converting a stream of incoming serial video data which is received frame by frame and is formatted with all data bits arriving together for each pixel into digital PWM video formatted as a sequence of like-weighted bits. Incoming video data is temporarily stored in a digital memory. A controller organized the data in the memory into a plurality of buffers, each buffer having only bits of like weight. The data is collected as groups within the buffers. The data is then coupled to a display device as the groups of like-weighted bits after a predetermined fraction of a frame time for producing the desired PWM signal. Since each bit of the incoming video data is stored for a fraction of a frame time, the present invention facilitates decimation of the total amount of buffer memory, compared to that of the prior art.

Abstract: A time interleaved bit addressed weighted pulse width modulation (PWM) method and apparatus reduces the bandwidth requirement necessary for providing a plurality of data entries regarding multiple points of information. As is well known, a weighted PWM scheme modulates an output by utilizing a frame time that is divided into events of varying durations; most conventional schemes have each bit in the frame being half the duration of its predecessor. The modulated signal is activated during all, some or none of the events in the frame to develop a signal representing a particular parameter. This method and apparatus can be used in a display for selecting among varying levels of gray scale or from among multiple colors on a palette. In one application for a display, a register containing the same number of data pits as pixels in a row of the display is provided. The register is loaded with one bit per frame for each pixel in the entire row.