Patents by Inventor Richard Joseph De Souza

Richard Joseph De Souza has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7074681
    Abstract: A semiconductor component includes a substrate (110) having a surface, a channel region (120, 220) located in the substrate, a non-electrically conductive region (130) substantially located below a substantially planar plane defined by the surface of the substrate, a drift region (140, 240) located in the substrate and between the channel region and the non-electrically conductive region, and an electrically floating region (150, 350, 450, 550) located in the substrate and contiguous with the non-electrically conductive region.
    Type: Grant
    Filed: July 7, 2003
    Date of Patent: July 11, 2006
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Edouard D. de Fresart, Patrice Parris, Richard Joseph De Souza
  • Publication number: 20040097019
    Abstract: A semiconductor component includes a substrate (110) having a surface, a channel region (120, 220) located in the substrate, a non-electrically conductive region (130) substantially located below a substantially planar plane defined by the surface of the substrate, a drift region (140, 240) located in the substrate and between the channel region and the non-electrically conductive region, and an electrically floating region (150, 350, 450, 550) located in the substrate and contiguous with the non-electrically conductive region.
    Type: Application
    Filed: July 7, 2003
    Publication date: May 20, 2004
    Inventors: Edouard D. de Fresart, Patrice Parris, Richard Joseph De Souza
  • Publication number: 20030001216
    Abstract: A semiconductor component includes a substrate (110) having a surface, a channel region (120, 220) located in the substrate, a non-electrically conductive region (130) substantially located below a substantially planar plane defined by the surface of the substrate, a drift region (140, 240) located in the substrate and between the channel region and the non-electrically conductive region, and an electrically floating region (150, 350, 450, 550) located in the substrate and contiguous with the non-electrically conductive region.
    Type: Application
    Filed: June 27, 2001
    Publication date: January 2, 2003
    Applicant: Motorola, Inc.
    Inventors: Edouard D. de Fresart, Patrice Parris, Richard Joseph De Souza