Patents by Inventor Richard L. Bartolotti

Richard L. Bartolotti has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Constraint management and validation for template-based circuit design
    Patent number: 8010920
    Abstract: A technique for constraint management and validation for template-based device designs is disclosed. The technique includes generating a template-level representation of an electronic device design based on a transistor-level representation of the electronic device design. The template-level representation includes one or more hierarchies of templates. Each template represents a corresponding portion of the electronic device design. The technique further includes determining constraint declarations associated with the electronic device design and verifying whether there is a functional equivalence between the template-level representation to a register-transfer-level (RTL) representation of the electronic device design. The technique additionally includes verifying whether the constraint declarations are valid and verifying the electronic device design responsive to verifying the functional equivalence and verifying the constraint declarations.
    Type: Grant
    Filed: December 11, 2008
    Date of Patent: August 30, 2011
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Richard L. Bartolotti, Thomas D. Burd, Brian D. McMinn, William A. McGee, Arun Chandra
  • CONSTRAINT MANAGEMENT AND VALIDATION FOR TEMPLATE-BASED CIRCUIT DESIGN
    Publication number: 20100153893
    Abstract: A technique for constraint management and validation for template-based device designs is disclosed. The technique includes generating a template-level representation of an electronic device design based on a transistor-level representation of the electronic device design. The template-level representation includes one or more hierarchies of templates. Each template represents a corresponding portion of the electronic device design. The technique further includes determining constraint declarations associated with the electronic device design and verifying whether there is a functional equivalence between the template-level representation to a register-transfer-level (RTL) representation of the electronic device design. The technique additionally includes verifying whether the constraint declarations are valid and verifying the electronic device design responsive to verifying the functional equivalence and verifying the constraint declarations.
    Type: Application
    Filed: December 11, 2008
    Publication date: June 17, 2010
    Applicant: ADVANCED MICRO DEVICES, INC.
    Inventors: Richard L. Bartolotti, Thomas D. Burd, Brian D. McMinn, William A. McGee, Arun Chandra