Abstract: An article of footwear includes an upper including a chamber, a compressible component disposed within the chamber and operable between a relaxed state and a constricted state, a sole structure including a recess forming a cavity, and a pump device disposed within the cavity and fluidly coupled to the chamber, the pump device operable to transition the compressible component from the relaxed state to the constricted state by removing fluid from the chamber.

Abstract: Improved methods for driving an active matrix of pixel electrodes controlled with thin film transistors when the voltage on a top electrode is being altered between driving frames. The methods described increase performance by providing smaller swings in the overall voltage between the top electrode and pixel electrode while reducing stress on the thin film transistor.

Abstract: A truck bed tarp support assembly for quick assembly to be positioned in a bed of a pickup truck to facilitate providing shelter over the pickup truck bed includes a plurality of tubes interconnected to from a support frame having a base that rests on the bottom of a pickup truck bed. A base portion of the support frame further has a pair of raised portions positioned to receive wheel wells in the pickup truck bed.

Abstract: Disclosed is a primary data processing system comprised of, for example, a main store, a storage unit, an instruction unit, an execution unit, a console unit and a channel unit for performing primary system programs. The console unit includes a secondary digital computer for performing secondary programs which functions to observe and/or alter the primary system. The functions performable by the secondary system include altering the primary system control state, causing primary commands to be executed, controlling primary data and addresses, and scanning out primary information. The console is connected through a command bus, an address bus and a data bus to the controls and data paths of the channel unit, of the instruction unit and of the storage unit.

Abstract: Disclosed is a primary data processing system comprised of, for example, a main store, a storage unit, an instruction unit, an execution unit, a console unit and a channel unit for performing primary system programs. The console unit includes a secondary digital computer for performing secondary programs which functions to observe and/or alter the primary system. The functions performable by the secondary system include altering the primary system control state, causing primary commands to be executed, controlling primary data and addresses, and scanning out primary information. The console is connected through a command bus, an address bus and a data bus to the controls and data paths of the channel unit, of the instruction unit and of the storage unit.

Abstract: A data processing system having a principal apparatus, such as a programmable large-scale data processing system, and a secondary apparatus. The secondary apparatus performs fault detection and analysis on the principal apparatus. The secondary apparatus under control of a secondary program and independently from the principal apparatus, accesses information from different points, such as latch circuits, throughout the principal appartus. The accessed information is utilized by the secondary apparatus to form an actual checksum having a value determined by the accessed information. The actual checksum thus formed is compared with an expected checksum provided from storage by the secondary apparatus. If the actual and expected checksums are different, a fault condition is indicated. An analysis of selected subsets of points in the primary apparatus is made using a compacted scan composed of the values of the selected subset of points.

Abstract: Disclosed is a data processing system including a channel unit which services a plurality of channels. The channel unit is connected between the data processing system and the control units which control the operations of I/O devices. The channel unit includes one processor for controlling transfers between channel storage and system storage and having another processor for controlling transfers between input/output devices and channel storage.