Abstract: A programmable gain amplifier having three separately programmable amplifiers. A programmable transconductance amplifier is followed by a programmable transimpedance amplifier, then a programmable switched capacitor amplifier. In one embodiment, this programmable gain amplifier is implemented in an analog front-end (AFE) circuit. One AFE embodiment provides a coarse pre-gain offset a black reference level sampler, and a fine post-gain offset in the programmable switched capacitor amplifier. In one embodiment, an ADC reference is sampled, and is subtracted directly from the video signal in the switched capacitor amplifier so that the zero level of the video signal is made to correspond to the zero level of the ADC.

Abstract: A read/write circuit for a disk drive system with a two-terminal magnetic head, having an adjustable damping resistor across the magnetic head. A switch network connects across the magnetic head and controls a resistor network to obtain an optimum level of impedance across the magnetic head in both the read mode and the write mode. The circuit provides a lower and well-defined impedance across the magnetic head in the write mode for all operating voltages across the head. A clamp circuit operates to prevent the write current source from saturating to improve current switching speed in the write mode.