Patents by Inventor Richard L. Stanton

Richard L. Stanton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Architecture and logic to control a device without a JTAG port through a device with a JTAG port
    Patent number: 6757844
    Abstract: An apparatus comprising a first circuit comprising a JTAG port and a second port. A JTAG non-compliant circuit may be controlled by the JTAG port when connected to the second port.
    Type: Grant
    Filed: October 25, 2000
    Date of Patent: June 29, 2004
    Assignee: Cypress Semiconductor Corp.
    Inventors: Navaz Lulla, Anup Nayak, Harish Dangat, Richard L. Stanton
  • PLD configuration port architecture and logic
    Patent number: 6748456
    Abstract: A programmable logic device (PLD) comprising a configuration controller. The configuration controller may be configured to (i) retrieve data and (ii) program a number of configuration bits of the PLD in response to the data.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: June 8, 2004
    Assignee: Cypress Semiconductor Corp.
    Inventors: Richard L. Stanton, Anup Nayak, Navaz Lulla, Harish Dangat
  • Fast centralized arbitrator
    Patent number: 5274822
    Abstract: A fast centralized arbitrator for avoiding contention between up to eight processors or other smart devices having access to a shared computer facility. Each of the processors or smart devices is assigned a unique three digit octal formatted priority level. A first set of 1-of-8 decoders, AND gates and a prioritizer circuit are employed to determine the priority level of the highest priority device requesting access to the shared facility. A second set of 1-of-8 decoders, each having associated therewith a set of OR gates for combining the decoder outputs with the outputs of the prioritizer circuit and an AND gate for combining the outputs of the set of OR gates, are employed to generate a set of acknowledge signals for the smart devices.
    Type: Grant
    Filed: July 2, 1990
    Date of Patent: December 28, 1993
    Assignee: NCR Corporation
    Inventors: Richard L. Stanton, Kenneth J. Kotlowski