Abstract: An automatic scan test enable signal assertion system and method responds to transitions in signals communicated via selected pins that are not dedicated solely to testing operations. Pins are utilized to communicate a trigger signal and a stage progression signal. The trigger signal provides an indication to initiate a scan test enable signal assertion or deassertion and the stage progression signal controls the progress of the scan test enable activation or deactivation initiation. A scan test enable trigger sensing component provides an assertion or deassertion notification when logical values of a trigger signal captured during multiple stages provide an indication to begin a scan test enable signal assertion or deassertion. A staging component advances the logical values through stages in accordance with a progression signal and issues an asserted or deasserted scan test enable signal based upon the assertion or deassertion notification from the scan test enable trigger sensing component.

Abstract: A phase detector is disclosed that eliminates frequency ripple in a phase-locked loop circuit. The detector includes first and second circuits for providing UP and DOWN signals respectively. It also includes a delay element for setting the duration of the DOWN signal so as to eliminate phase jitter and static phase offset.

Abstract: A phase detector is disclosed that eliminates frequency ripple in a phase-locked loop circuit. The detector includes first and second circuits for providing UP and DOWN signals respectively. It also includes a delay element for setting the duration of the DOWN signal so as to eliminate phase jitter and static phase offset.