Patents by Inventor Richard Lai

Richard Lai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240088923
    Abstract: Wireless receiver systems and methods for user equipment are described that employ multiple receiver heads. The multiple heads can receive wireless communication signals over different receive paths from different transmission sources. The systems can scan and monitor signal quality from all receiver heads during a scheduled gap in a communication link without interfering with an ongoing communication session.
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Applicant: MEDIATEK Singapore Pte. Ltd.
    Inventors: Yangjian Chen, Jonathan Richard Strange, Yabo Li, Ganning Yang, Wei-Yu Lai, Wei-Jen Chen
  • Patent number: 11003773
    Abstract: A method for generating rule recommendation utilized in a creation of malware detection rules is described. Meta-information associated with a plurality of events collected during a malware detection analysis of an object by a cybersecurity system is received and a first plurality of features is selected from the received meta-information. Machine learning (ML) models are applied to each of the first plurality of features to generate a score that represents a level of maliciousness for the feature and thereby a degree of usefulness of the feature in classifying the object as malicious or benign. Thereafter, a second plurality of features is selected as the salient features, which are used in creation of the malware detection rules in controlling subsequent operations of the cybersecurity system. The second plurality of features being lesser in number that the first plurality of features.
    Type: Grant
    Filed: March 30, 2018
    Date of Patent: May 11, 2021
    Assignee: FireEye, Inc.
    Inventors: Chunsheng Fang, Wei Quan, Richard Lai, Robert Venal, Benjamin Chang
  • Patent number: 9882000
    Abstract: A field effect transistor (FET) including a substrate, a plurality of semiconductor epitaxial layers deposited on the substrate, and a heavily doped gate layer deposited on the semiconductor layers. The FET also includes a plurality of castellation structures formed on the heavily doped gate layer and being spaced apart from each other, where each castellation structure includes at least one channel layer. A gate metal is deposited on the castellation structures and between the castellation structures to be in direct electrical contact with the heavily doped gate layer. A voltage potential applied to the gate metal structure modulates the at least one channel layer in each castellation structure from an upper, lower and side direction.
    Type: Grant
    Filed: May 24, 2016
    Date of Patent: January 30, 2018
    Assignee: Northrop Grumman Systems Corporation
    Inventors: Stephen J. Sarkozy, Yaochung Chen, Richard Lai
  • Publication number: 20170345895
    Abstract: A field effect transistor (FET) including a substrate, a plurality of semiconductor epitaxial layers deposited on the substrate, and a heavily doped gate layer deposited on the semiconductor layers. The FET also includes a plurality of castellation structures formed on the heavily doped gate layer and being spaced apart from each other, where each castellation structure includes at least one channel layer. A gate metal is deposited on the castellation structures and between the castellation structures to be in direct electrical contact with the heavily doped gate layer. A voltage potential applied to the gate metal structure modulates the at least one channel layer in each castellation structure from an upper, lower and side direction.
    Type: Application
    Filed: May 24, 2016
    Publication date: November 30, 2017
    Inventors: STEPHEN J. SARKOZY, YAOCHUNG CHEN, RICHARD LAI
  • Patent number: 9577083
    Abstract: A field effect transistor (FET) device including a substrate and a plurality of semiconductor layers provided on the substrate, where a top semiconductor layer is a heavily doped cap layer and another one of the semiconductor layers directly below the cap layer is a Schottky barrier layer, and where a gate recess is formed through the cap layer and into the Schottky barrier layer. The FET device also includes a gate terminal having a titanium layer, an inhibitor layer provided on the titanium layer and a gold layer provided on the inhibitor layer, where the gate terminal is formed in the recess so that the titanium layer is in contact with the Schottky barrier layer, and where the inhibitor layer is effective for preventing hydrogen gas from being dissociated into hydrogen atoms so as to reduce or prevent hydrogen poisoning of the FET device.
    Type: Grant
    Filed: March 16, 2016
    Date of Patent: February 21, 2017
    Assignee: Northrop Grumman Systems Corporation
    Inventors: Yeong-Chang Chou, Richard Lai, Quin W. Kan, Keang H. Kho, Hsu-Hwei Chen, Matthew R. Parlee
  • Publication number: 20150153777
    Abstract: Systems and methods for providing a user interface by using a flexible display screen as well as an inflexible display screen. The dual display screens are installed on the same electronic device and may be used to display information simultaneously or alternatively. The flexible display screen can display information in an expanded position and is substantially compacted in size in a retracted position. In response to a user request, the flexible display screen can automatically wind around a rotatable axial connector. The inflexible touchscreen may serve to receive user input with respect to the content displayed on the flexible display screen. An instant size of the flexible display screen can be detected by a sensor and used to adapt a format of the content displayed on the flexible display screen.
    Type: Application
    Filed: December 3, 2013
    Publication date: June 4, 2015
    Applicant: NVIDIA Corporation
    Inventors: Laurence LIU, Richard LAI
  • Publication number: 20150122994
    Abstract: An imaging system is provided. The system includes a receiver to passively receive a millimeter wave (MMW) power level input from a scene and generates an analog output signal. A driver circuit receives the analog output signal and generates a drive output signal based on the amplitude of the analog output signal. A wavelength converter generates a light intensity output is a replica of a portion of the scene associated with the MMW power level input at a different wavelength range than the MMW power level input wavelength range.
    Type: Application
    Filed: November 5, 2013
    Publication date: May 7, 2015
    Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: Mikio Larry YUJIRI, Richard LAI, Lakshminarayanan R. NARASIMHAN
  • Patent number: 9006090
    Abstract: A method for forming a shielded gate of a MOSFET includes steps as following: providing a semiconductor substrate having at least one trench, forming a bottom gate oxide region and a shielded gate poly region in the trench of the semiconductor substrate, forming an inter-poly oxide region on the shielded gate poly region through high temperature plasma deposition, poly etching back and oxide etching back; and forming a gate oxide region and a gate poly region on the inter-poly oxide region. By utilizing the etching back processes in replace of traditional chemical mechanical polishing processes, the manufacturing cost of manufacturing a shielded gate structure is reduced, and the total cost of manufacturing a FET is also reduced. Meanwhile, the gate charge is effectively reduced due to the shielded gate structure, so that the performance of a MOSFET is enhanced.
    Type: Grant
    Filed: September 6, 2013
    Date of Patent: April 14, 2015
    Assignee: Mosel Vitelic Inc.
    Inventor: Richard Lai
  • Publication number: 20150037968
    Abstract: A method for forming a shielded gate of a MOSFET includes steps as following: providing a semiconductor substrate having at least one trench, forming a bottom gate oxide region and a shielded gate poly region in the trench of the semiconductor substrate, forming an inter-poly oxide region on the shielded gate poly region through high temperature plasma deposition, poly etching back and oxide etching back; and forming a gate oxide region and a gate poly region on the inter-poly oxide region. By utilizing the etching back processes in replace of traditional chemical mechanical polishing processes, the manufacturing cost of manufacturing a shielded gate structure is reduced, and the total cost of manufacturing a FET is also reduced. Meanwhile, the gate charge is effectively reduced due to the shielded gate structure, so that the performance of a MOSFET is enhanced.
    Type: Application
    Filed: September 6, 2013
    Publication date: February 5, 2015
    Applicant: Mosel Vitelic Inc.
    Inventor: Richard Lai
  • Patent number: 8686813
    Abstract: An electronic system. The electronic system includes a waveguide structure having a first waveguide-coupling point and a second waveguide-coupling point and an active electronic circuit having a first circuit-coupling point and a second circuit-coupling point. The second waveguide-coupling point is coupled to the first circuit-coupling point; the system is capable of receiving an input signal at the first waveguide-coupling point and transmitting an output signal at the second circuit-coupling point and/or receiving the input signal at the second circuit-coupling point and transmitting the output signal at the first waveguide-coupling point; the input signal and the output signal have frequencies in a terahertz frequency range; and the system is fabricated as a monolithic integrated structure having the waveguide structure fabricated by micromachining and the circuit fabricated monolithically.
    Type: Grant
    Filed: August 29, 2009
    Date of Patent: April 1, 2014
    Assignee: Northrop Grumman Systems Corporation
    Inventors: William Roland Deal, Kevin Masaru Kung Hoong Leong, Vesna Radisic, Patty Pei-Ling Chang-Chien, Richard Lai
  • Publication number: 20110318471
    Abstract: A method for thawing and infusing partially frozen fruits or vegetables. Individually quick frozen fruits or vegetables are introduced into a mixing kettle. An infusion solution is circulated from a solution tank, through a bed of fruits or vegetables, and back to a solution tank. The infusion solution is maintained at a temperature of about 45° to about 50° F. and at a Brix of about 40° to about 50°. The infusion solution is pumped and circulated at a high rate which reduces thaw time but does not result in product degradation. After thawing, the pumping and re-circulating rate is decreased to allow for increased infusion efficiency. Pressure pulses are applied to the product in the mixing tank which decreases the infusion time. Thus, thawed and infused fruit and vegetables are produced quickly and with minimal product degradation.
    Type: Application
    Filed: September 7, 2011
    Publication date: December 29, 2011
    Applicant: FRITO-LAY NORTH AMERICA, INC.
    Inventors: Ashish ANAND, Varadharajan Radhamani BASKER, Phillip FRAZIER, Richard LAI, Vamshidhar PUPPALA, William Cartwright WELLER
  • Patent number: 8071150
    Abstract: A method for thawing and infusing partially frozen fruits or vegetables. Individually quick frozen fruits or vegetables are introduced into a mixing kettle. An infusion solution is circulated from a solution tank, through a bed of fruits or vegetables, and back to a solution tank. The infusion solution is maintained at a temperature of about 45° to about 50° F. and at a Brix of about 40° to about 50°. The infusion solution is pumped and circulated at a high rate which reduces thaw time but does not result in product degradation. After thawing, the pumping and re-circulating rate is decreased to allow for increased infusion efficiency. Pressure pulses are applied to the product in the mixing tank which decreases the infusion time. Thus, thawed and infused fruit and vegetables are produced quickly and with minimal product degradation.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: December 6, 2011
    Assignee: Frito-Lay North America, Inc.
    Inventors: Ashish Anand, Varadharajan Radhamani Basker, Phillip Frazier, Richard Lai, Vamshidhar Puppala, William Cartwright Weller
  • Patent number: 7947320
    Abstract: The present invention discloses a method for making a multi-grain, whole grain baked snack food product with a soft, crunchy texture similar to a cracker. Ingredient formula ranges have been determined that maximize the amount and number of nutritious whole grains present in the snack food, while still keeping the texture soft and crunchy, and the color and flavor acceptable. The ingredients are combined with water to make a dough, which is then sheeted and cut into pieces. The pieces are baked to produce a multi-grain, whole grain baked snack food.
    Type: Grant
    Filed: February 12, 2009
    Date of Patent: May 24, 2011
    Assignee: Frito-Lay North America, Inc.
    Inventors: Pierre Faa, Richard Lai
  • Publication number: 20110050371
    Abstract: An electronic system. The electronic system includes a waveguide structure having a first waveguide-coupling point and a second waveguide-coupling point and an active electronic circuit having a first circuit-coupling point and a second circuit-coupling point. The second waveguide-coupling point is coupled to the first circuit-coupling point; the system is capable of receiving an input signal at the first waveguide-coupling point and transmitting an output signal at the second circuit-coupling point and/or receiving the input signal at the second circuit-coupling point and transmitting the output signal at the first waveguide-coupling point; the input signal and the output signal have frequencies in a terahertz frequency range; and the system is fabricated as a monolithic integrated structure having the waveguide structure fabricated by micromachining and the circuit fabricated monolithically.
    Type: Application
    Filed: August 29, 2009
    Publication date: March 3, 2011
    Inventors: William Roland Deal, Kevin Masaru Kung Hoong Leong, Vesna Radisic, Patty Pei-Ling Chang-Chien, Richard Lai
  • Patent number: 7709860
    Abstract: In a method of forming a semiconductor device on a semiconductor substrate (100), a photoresist layer (102) is deposited on the semiconductor substrate; a window (106) is formed in the photoresist layer (102) by electron beam lithography; a conformal layer (108) is deposited on the photoresist layer (102) and in the window (106); and substantially all of the conformal layer (108) is selectively removed from the photoresist layer (102) and a bottom portion of the window to form dielectric sidewalls (110) in the window (106).
    Type: Grant
    Filed: April 29, 2009
    Date of Patent: May 4, 2010
    Assignee: Northrop Grumman Space & Mission Systems Corp.
    Inventors: Linh Dang, Wayne Yoshida, Xiaobing Mei, Jennifer Wang, Po-Hsin Liu, Jane Lee, Weidong Liu, Michael Barsky, Richard Lai
  • Publication number: 20090206369
    Abstract: In a method of forming a semiconductor device on a semiconductor substrate (100), a photoresist layer (102) is deposited on the semiconductor substrate; a window (106) is formed in the photoresist layer (102) by electron beam lithography; a conformal layer (108) is deposited on the photoresist layer (102) and in the window (106); and substantially all of the conformal layer (108) is selectively removed from the photoresist layer (102) and a bottom portion of the window to form dielectric sidewalls (110) in the window (106).
    Type: Application
    Filed: April 29, 2009
    Publication date: August 20, 2009
    Applicant: NORTHROP GRUMMAN SPACE & MISSION SYSTEMS CORP.
    Inventors: Linh Dang, Wayne Yoshida, Xiaobing Mei, Jennifer Wang, Po-Hsin Liu, Jane Lee, Weidong Liu, Michael Barsky, Richard Lai
  • Publication number: 20090162504
    Abstract: A method for thawing and infusing partially frozen fruits or vegetables. Individually quick frozen fruits or vegetables are introduced into a mixing kettle. An infusion solution is circulated from a solution tank, through a bed of fruits or vegetables, and back to a solution tank. The infusion solution is maintained at a temperature of about 45° to about 50° F. and at a Brix of about 40° to about 50°. The infusion solution is pumped and circulated at a high rate which reduces thaw time but does not result in product degradation. After thawing, the pumping and re-circulating rate is decreased to allow for increased infusion efficiency. Pressure pulses are applied to the product in the mixing tank which decreases the infusion time. Thus, thawed and infused fruit and vegetables are produced quickly and with minimal product degradation.
    Type: Application
    Filed: December 21, 2007
    Publication date: June 25, 2009
    Inventors: ASHISH ANAND, VARADHARAJAN RADHAMANI BASKER, PHILLIP FRAZIER, RICHARD LAI, VAMSHIDHAR PUPPALA, WILLIAM CARTWRIGHT WELLER
  • Publication number: 20090148581
    Abstract: The present invention discloses a method for making a multi-grain, whole grain baked snack food product with a soft, crunchy texture similar to a cracker. Ingredient formula ranges have been determined that maximize the amount and number of nutritious whole grains present in the snack food, while still keeping the texture soft and crunchy, and the color and flavor acceptable. The ingredients are combined with water to make a dough, which is then sheeted and cut into pieces. The pieces are baked to produce a multi-grain, whole grain baked snack food.
    Type: Application
    Filed: February 12, 2009
    Publication date: June 11, 2009
    Applicant: FRITO-LAY NORTH AMERICA, INC.
    Inventors: Pierre FAA, Richard LAI
  • Patent number: 7507431
    Abstract: The present invention discloses a method for making a multi-grain, whole grain baked snack food product with a soft, crunchy texture similar to a cracker. Ingredient formula ranges have been determined that maximize the amount and number of nutritious whole grains present in the snack food, while still keeping the texture soft and crunchy, and the color and flavor acceptable. The ingredients are combined with water to make a dough, which is then sheeted and cut into pieces. The pieces are baked to produce a multi-grain, whole grain baked snack food.
    Type: Grant
    Filed: August 24, 2006
    Date of Patent: March 24, 2009
    Assignee: Frito-Lay North America, Inc.
    Inventors: Pierre Faa, Richard Lai
  • Patent number: 7411226
    Abstract: An InP high electron mobility transistor (HEMT) structure in which a gate metal stack includes an additional thin layer of a refractory metal, such as molybdenum (Mo) or platinum (Pt) at a junction between the gate metal stack and a Schottky barrier layer in the HEMT structure. The refractory metal layer reduces or eliminates long-term degradation of the Schottky junction between the gate metal and the barrier layer, thereby dramatically improving long-term reliability of InP HEMTs, but without sacrifice in HEMT performance, whether used as a discrete device or in an integrated circuit.
    Type: Grant
    Filed: April 27, 2005
    Date of Patent: August 12, 2008
    Assignee: Northrop Grumman Corporation
    Inventors: Yeong-Chang Choug, Ronald Grundbacher, Po-Hsin Liu, Denise L. Leung, Richard Lai