Patents by Inventor Richard Lary
Richard Lary has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7783696Abstract: Service processors within a system are self-clustered. The system can also include an operating system or other software code, a management console, or both. The operating system communicates with the cluster of service processors, where the service processors are self-clustered or otherwise, such as through a memory shared by at least all the service processors. The operating system therefore need not be aware which of the service processors performs a given function. The console communicates with the cluster of service processors, where the service processors are self-clustered or otherwise, through any service processor of the cluster. The console therefore also need not be aware that the service processors have been clustered to perform functionality for the console.Type: GrantFiled: June 29, 2008Date of Patent: August 24, 2010Assignee: International Business Machines CorporationInventors: Brad A. Davis, Henry J. DiVincenzo, Richard A. Lary, Thomas E. Malone, Patrick D. Mason, Lee G. Rosenbaum, Manoj R. Sastry, Pat White
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Publication number: 20080263129Abstract: Service processors within a system are self-clustered. The system can also include an operating system or other software code, a management console, or both. The operating system communicates with the cluster of service processors, where the service processors are self-clustered or otherwise, such as through a memory shared by at least all the service processors. The operating system therefore need not be aware which of the service processors performs a given function. The console communicates with the cluster of service processors, where the service processors are self-clustered or otherwise, through any service processor of the cluster. The console therefore also need not be aware that the service processors have been clustered to perform functionality for the console.Type: ApplicationFiled: June 29, 2008Publication date: October 23, 2008Inventors: Brad A. Davis, Henry J. DiVincenzo, Richard A. Lary, Thomas E. Malone, Patrick D. Mason, Lee G. Rosenbaum, Manoj R. Sastry, Patrick W. White
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Patent number: 7433914Abstract: The self-clustering of service processors within a system is disclosed. The system can also include an operating system or other software code, a management console, or both. The operating system communicates with the cluster of service processors, where the service processors are self-clustered or otherwise, such as through a memory shared by at least all the service processors. The operating system therefore need not be aware which of the service processors performs a given function. The console communicates with the cluster of service processors, where the service processors are self-clustered or otherwise, through any service processor of the cluster. The console therefore also need not be aware that the service processors have been clustered to perform functionality for the console.Type: GrantFiled: September 13, 2001Date of Patent: October 7, 2008Assignee: International Business Machines CorporationInventors: Brad A. Davis, Henry J. DiVincenzo, Richard A. Lary, Thomas E. Malone, Patrick D. Mason, Lee G. Rosenbaum, Manoj R. Sastry, Patrick W. White
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Publication number: 20060101205Abstract: A very large virtual volume (e.g., in excess of 500 GB) is formed by distributing the disks in eleven, six-disk RAID-5 sets across the six busses of a primary local back-end controller. A spare disk is provided on each of the six busses. Each RAID-5 set is protected from the failure of a single disk by the spare disks on the busses, which can use the parity data stored in a RAID-5 set to rebuild the data stored on a failing disk and thereby restore redundancy to the RAID-5 set. Each RAID-5 set is also protected from the failure of a bus by the parity inherent in RAID-5. The RAID-5 sets are striped by a front-end controller connected to the primary local back-end controller, and the striped RAID-5 sets are presented to a host computer as a very large virtual volume. If the individual disks are 9.1 GB in size, the size of the very large virtual volume can reach 500.5 GB.Type: ApplicationFiled: December 22, 2005Publication date: May 11, 2006Inventors: Theodore Bruning, Randal Marks, Julia Hodges, Gerald Golden, Ryan Johnson, Bert Martens, Karen Workman, Susan Elkington, Richard Lary, Jesse Yandell, Stephen Sicola, Roger Oakey
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Patent number: 6993566Abstract: The self-clustering of entities within a system is disclosed. The system can also include a host. Each entity self-discovers all the other entities, such that the entities are aggregated as a cluster. The host communicates with the cluster of entities, where the entities are self-clustered or otherwise, such as through a memory shared by all the entities. The host therefore need not be aware which of the entities performs a given function.Type: GrantFiled: September 13, 2001Date of Patent: January 31, 2006Assignee: International Business Machines CorporationInventors: Brad A. Davis, Henry J. DiVincenzo, Richard A. Lary, Thomas E. Malone, Patrick D. Mason, Lee G. Rosenbaum, Manoj R. Sastry, Patrick W. White
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Patent number: 6988155Abstract: The aggregation of hardware events in multi-node systems is disclosed. An event occurring at a remote node is forwarded to a primary node, by firmware of the remote node writing to a first register of the primary node. The event is propagated from the first register of the primary node to a second register node. In automatic response, an interrupt is generated at the primary node. An interrupt handler of the primary node, in response to generation of the interrupt, then invokes code at the primary node to handle the event occurring at the remote node.Type: GrantFiled: October 1, 2001Date of Patent: January 17, 2006Assignee: International Business Machines CorporationInventors: Richard A. Lary, Daniel H. Bax
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Patent number: 6988136Abstract: A multi-cabinet mass storage system with unified management features. The system includes a first reporting group and a second reporting group each having enclosure with processors, such as an environmental monitoring units (EMUs), for generating and transmitting environmental messages pertaining to the particular enclosures. The enclosures are positioned on shelves within cabinets. A bus or cabinet cable links each enclosure to facilitate broadcasting the environmental messages. The environmental messages identify the sending device's reporting group and its physical location within the system. Additional enclosures are included in this reporting group with enclosures of each reporting group located all in one cabinet, in two or more cabinets, and each cabinet may house one, two, or more reporting groups. A network links all of the cabinets to concurrently broadcast the environmental messages throughout the system and allows enclosures in a single reporting group to be positioned in differing cabinets.Type: GrantFiled: October 19, 2001Date of Patent: January 17, 2006Assignee: Hewlett-Packard Development Company, L.P.Inventors: Stephen J. Sicola, Bruce Sardeson, Dennis Spicher, Bruce Roberts, Bill Pagano, Richard Lary, William K. Miller, Mark J. Conrad
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Patent number: 6701403Abstract: Non-volatile memory access, such as firmware access by a service processor, is disclosed. The service processor asserts a controller signal to select either a first non-volatile memory, or a second non-volatile memory. The first non-volatile memory is located behind a first bridge controller and is otherwise accessible by the service processor. The second non-volatile memory is located behind a second bridge controller and is otherwise accessible only by a processor other than the service processor. The service processor then access the selected non-volatile memory, via a bus communicatively coupled to both the non-volatile memories.Type: GrantFiled: October 1, 2001Date of Patent: March 2, 2004Assignee: International Business Machines CorporationInventors: Richard A. Lary, Daniel H. Bax
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Publication number: 20030079082Abstract: A multi-cabinet mass storage system with unified management features. The system includes a first reporting group and a second reporting group each having enclosure with processors, such as an environmental monitoring units (EMUs), for generating and transmitting environmental messages pertaining to the particular enclosures. The enclosures are positioned on shelves within cabinets. A bus or cabinet cable links each enclosure to facilitate broadcasting the environmental messages. The environmental messages identify the sending device's reporting group and its physical location within the system. Additional enclosures are included in this reporting group with enclosures of each reporting group located all in one cabinet, in two or more cabinets, and each cabinet may house one, two, or more reporting groups. A network links all of the cabinets to concurrently broadcast the environmental messages throughout the system and allows enclosures in a single reporting group to be positioned in differing cabinets.Type: ApplicationFiled: October 19, 2001Publication date: April 24, 2003Inventors: Stephen J. Sicola, Bruce Sardeson, Dennis Spicher, Bruce Roberts, Bill Pagano, Richard Lary, William K. Miller, Mark J. Conrad
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Publication number: 20030065853Abstract: The aggregation of hardware events in multi-node systems is disclosed. An event occuring at a remote node is forwarded to a primary node, by firmware of the remote node writing to a first register of the primary node. The event is propagated from the first register of the primary node to a second register node. In automatic response, an interrupt is generated at the primary node. An interrupt handler of the primary node, in response to generation of the interrupt, then invokes code at the primary node to handle the event occurring at the remote node.Type: ApplicationFiled: October 1, 2001Publication date: April 3, 2003Applicant: International Business Machines CorporationInventors: Richard A. Lary, Daniel H. Bax
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Publication number: 20030065893Abstract: Non-volatile memory access, such as firmware access by a service processor, is disclosed. The service processor asserts a controller signal to select either a first nonvolatile memory, or a second non-volatile memory. The first non-volatile memory is located behind a first bridge controller and is otherwise accessible by the service processor. The second non-volatile memory is located behind a second bridge controller and is otherwise accessible only by a processor other than the service processor. The service processor then access the selected non-volatile memory, via a bus communicatively coupled to both the non-volatile memories.Type: ApplicationFiled: October 1, 2001Publication date: April 3, 2003Applicant: International Business Machines CorporationInventors: Richard A. Lary, Daniel H. Bax
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Publication number: 20030050993Abstract: The self-clustering of entities within a system is disclosed. The system can also include a host. Each entity self-discovers all the other entities, such that the entities are aggregated as a cluster. The host communicates with the cluster of entities, where the entities are self-clustered or otherwise, such as through a memory shared by all the entities. The host therefore need not be aware which of the entities performs a given function.Type: ApplicationFiled: September 13, 2001Publication date: March 13, 2003Applicant: International Business Machines CorporationInventors: Brad A. Davis, Henry J. DiVincenzo, Richard A. Lary, Thomas E. Malone, Patrick D. Mason, Lee G. Rosenbaum, Manoj R. Sastry, Patrick W. White
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Publication number: 20030050992Abstract: The self-clustering of service processors within a system is disclosed. The system can also include an operating system or other software code, a management console, or both. The operating system communicates with the cluster of service processors, where the service processors are self-clustered or otherwise, such as through a memory shared by at least all the service processors. The operating system therefore need not be aware which of the service processors performs a given function. The console communicates with the cluster of service processors, where the service processors are self-clustered or otherwise, through any service processor of the cluster. The console therefore also need not be aware that the service processors have been clustered to perform functionality for the console.Type: ApplicationFiled: September 13, 2001Publication date: March 13, 2003Applicant: International Business Machines CorporationInventors: Brad A. Davis, Henry J. DiVincenzo, Richard A. Lary, Thomas E. Malone, Patrick D. Mason, Lee G. Rosenbaum, Manoj R. Sastry, Patrick W. White
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Patent number: 5657471Abstract: A dual addressing arrangement comprises a complex address pointer within entries of a communication queue used by a port driver and an port adapter when exchanging information in a host computer. The complex address pointer comprises a virtual address portion and a physical address portion. The port driver uses the virtual address portion to ascertain the location of entry structures, while the port adapter uses the physical address portion to locate the structures in a host memory. The arrangement and interpretation of the address portions of the complex pointers within an entry depend upon the direction of information flow, i.e., the passing of messages from the port driver to the port adapter using a driver-to adapter queue or the passing of responses from the adapter to the driver using an adapter-to-driver queue.Type: GrantFiled: April 16, 1992Date of Patent: August 12, 1997Assignee: Digital Equipment CorporationInventors: Richard Lary, Robert Willard, Catharine van Ingen, David Thiel, William Watson, Barry Rubinson, Verell Boaen
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Patent number: 5386524Abstract: A memory mapping system for use by a port adapter in a computer facilitates access to named data buffers in host memory. The system generally comprises a mechanism that enables the adapter to efficiently translate the data buffer name to physical address locations in host memory without knowledge of the memory management policies of the computer. Specifically, the system includes various data structures and pointers that allow the port adapter to view host memory in "port pages" when accessing memory locations of a named data buffer. The data locations are virtually, but not physically, contiguous and the invention provides efficient identification of the physical addresses of the locations.Type: GrantFiled: April 16, 1992Date of Patent: January 31, 1995Assignee: Digital Equipment CorporationInventors: Richard Lary, Robert Willard, Catharine Van Ingen, David Thiel, William Watson, Barry Rubinson, Verell Boaen
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Patent number: 5386514Abstract: A communication interface between a port driver and an port adapter of a host computer includes a singly-linked queue resident in a host memory of the computer. The queue includes a header element and a stopper element with message entries linked therebetween. The message entries contain information to be exchanged between the port driver and port adapter. Each message entry includes at least a carrier that contains a forward link pointer to the next entry in the queue and message/response specific control information. The stopper element identifies the end of the queue and is distinguishable from a message entry by a valid indicator, e.g., the state of at least one bit of the forward link pointer. Functionally, the stopper entry allows the port driver and port adapter to concurrently insert and remove message entries of the singly-linked queue in a reliable manner without the use of any external synchronization mechanism.Type: GrantFiled: April 16, 1992Date of Patent: January 31, 1995Assignee: Digital Equipment CorporationInventors: Richard Lary, Robert Willard, Catharine van Ingen, David Thiel, William Watson, Barry Rubinson, Edward A. Gardner, Verell Boaen
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Patent number: 5020020Abstract: A computer interconnect system uses packet data transmission over serial links connecting nodes of a network. The serial links may provide simultaneous dual paths for transmit/receive. An adapter couples a CPU or the like at a node to the serial link. The adapter includes a packet memory for temporarily storing transmit packets and receive packets, along with a port processor for executing the protocol. Packets of data are transferred between the system bus of the CPU and the packet memory by a pair of data movers, one for read and one for write. All of the serial links of the system are connected to a distribution hub which forwards a transmitted packet to a destination node based upon an address sent with the packet. If the path to the destination node is busy, the hub returns a "flow control" signal to the source node, and in response to this signal the transmitted packet is aborted so that time on the network is not wasted by needless transmission that must be discarded.Type: GrantFiled: April 7, 1989Date of Patent: May 28, 1991Assignee: Digital Equipment CorporationInventors: Stephen T. Pomfret, Richard Lary, Yerell Boaen