Patents by Inventor Richard Lewis Walke

Richard Lewis Walke has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Shared multi-port memory from single port
    Patent number: 11721373
    Abstract: Embodiments herein describe a multi-port memory system that includes one or more single port memories (e.g., a memory that can perform only one read or one write at any given time, referred to as a 1W or 1R memory). That is, the multi-port memory system can perform multiple read and writes in parallel (e.g., 1R/1W, 1R/3W, 2R/2W, 3R/1W, etc.) even though the memory in the system can only perform one read or one write at any given time. The advantage of doing so is a reduction in area and power.
    Type: Grant
    Filed: May 20, 2022
    Date of Patent: August 8, 2023
    Assignee: XILINX, INC.
    Inventors: Richard Lewis Walke, John Edward Mcgrath
  • SHARED MULTI-PORT MEMORY FROM SINGLE PORT
    Publication number: 20230023866
    Abstract: Embodiments herein describe a multi-port memory system that includes one or more single port memories (e.g., a memory that can perform only one read or one write at any given time, referred to as a 1W or 1R memory). That is, the multi-port memory system can perform multiple read and writes in parallel (e.g., 1R/1W, 1R/3W, 2R/2W, 3R/1W, etc.) even though the memory in the system can only perform one read or one write at any given time. The advantage of doing so is a reduction in area and power.
    Type: Application
    Filed: May 20, 2022
    Publication date: January 26, 2023
    Inventors: Richard Lewis WALKE, John Edward MCGRATH
  • Shared multi-port memory from single port
    Patent number: 11348624
    Abstract: Embodiments herein describe a multi-port memory system that includes one or more single port memories (e.g., a memory that can perform only one read or one write at any given time, referred to as a 1W or 1R memory). That is, the multi-port memory system can perform multiple read and writes in parallel (e.g., 1R/1W, 1R/3W, 2R/2W, 3R/1W, etc.) even though the memory in the system can only perform one read or one write at any given time. The advantage of doing so is a reduction in area and power.
    Type: Grant
    Filed: March 23, 2021
    Date of Patent: May 31, 2022
    Assignee: XILINX, INC.
    Inventors: Richard Lewis Walke, John Edward Mcgrath