Patents by Inventor Richard Livengood

Richard Livengood has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11931399
    Abstract: Embodiments herein report compositions, uses and manufacturing of dengue virus constructs and live attenuated dengue viruses. Some embodiments concern a composition that includes, but is not limited to, a tetravalent dengue virus composition. In certain embodiments, compositions can include constructs of one or more serotypes of dengue virus, such as dengue-1 (DEN-1) virus, dengue-2 (DEN-2) virus, dengue-3 (DEN-3) or dengue-4 (DEN-4) virus constructs. In other embodiments, constructs disclosed herein can be combined in a composition to generate a vaccine against more one or more dengue virus constructs that may or may not be subsequently passaged in mammalian cells.
    Type: Grant
    Filed: December 12, 2022
    Date of Patent: March 19, 2024
    Assignee: Takeda Vaccines, Inc.
    Inventors: Dan T. Stinchcomb, Claire Kinney, Richard M. Kinney, Jill A. Livengood
  • Publication number: 20060170099
    Abstract: A modifiable circuit structure and its method of formation are disclosed. The modifiable circuit structure electrically couples one portion of an interconnect with another portion of the interconnect through vias disposed in a dielectric layer. The combination of the modifiable circuit structure, the interconnect portions, and the vias provide a signal path between transistors in an integrated circuit. In one embodiment the modifiable circuit structure is a polysilicon feature formed over regions of a semiconductor substrate. In an alternative embodiment, the modifiable circuit structure is a diffusion region formed in region the semiconductor substrate.
    Type: Application
    Filed: January 28, 2005
    Publication date: August 3, 2006
    Inventors: Richard Livengood, Darren Slawecki
  • Publication number: 20060172440
    Abstract: A modifiable circuit structure and its method of formation are disclosed. The modifiable circuit structure electrically couples one portion of an interconnect with another portion of the interconnect through vias disposed in a dielectric layer. The combination of the modifiable circuit structure, the interconnect portions, and the vias provide a signal path between transistors in an integrated circuit. In one embodiment the modifiable circuit structure is a polysilicon feature formed over regions of a semiconductor substrate. In an alternative embodiment, the modifiable circuit structure is a diffusion region formed in regions the semiconductor substrate.
    Type: Application
    Filed: November 18, 2005
    Publication date: August 3, 2006
    Inventors: Richard Livengood, Darren Slawecki
  • Publication number: 20050260775
    Abstract: Nano-machining for circuit edits through the front side or backside of an integrated circuit may be performed using a scanning probe system. The system may create access holes with smaller dimensions and facilitate nano-machining endpoint detection in some embodiments.
    Type: Application
    Filed: May 19, 2004
    Publication date: November 24, 2005
    Inventors: Michael DiBattista, Richard Livengood, Elizabeth Varner, Randall White
  • Patent number: 6855946
    Abstract: In one embodiment, the present invention includes a method. In the method, a fiducial transistor is provided in an integrated circuit. Also in the method, a power conductor is coupled to a first terminal of the transistor. Also in the method, a ground conductor is coupled to a second terminal of the transistor. Also in the method, a control conductor is coupled to a third terminal of the transistor. Also in the method, other circuitry is provided, the other circuitry is operatively decoupled from the fiducial transistor and the other circuitry is operable without the fiducial transistor.
    Type: Grant
    Filed: March 21, 2003
    Date of Patent: February 15, 2005
    Assignee: Intel Corporation
    Inventors: Steve Seidel, Simon Tam, Valluri Rao, Stefan Rusu, Richard Livengood
  • Patent number: 6753541
    Abstract: In one embodiment, the present invention includes a method. In the method, a fiducial transistor is provided in an integrated circuit. Also in the method, a power conductor is coupled to a first terminal of the transistor. Also in the method, a ground conductor is coupled to a second terminal of the transistor. Also in the method, a control conductor is coupled to a third terminal of the transistor. Also in the method, other circuitry is provided, the other circuitry is operatively decoupled from the fiducial transistor and the other circuitry is operable without the fiducial transistor.
    Type: Grant
    Filed: November 30, 1999
    Date of Patent: June 22, 2004
    Assignee: Intel Corporation
    Inventors: Steve Seidel, Simon Tam, Valluri Rao, Stefan Rusu, Richard Livengood
  • Publication number: 20030183786
    Abstract: In one embodiment, the present invention includes a method. In the method, a fiducial transistor is provided in an integrated circuit. Also in the method, a power conductor is coupled to a first terminal of the transistor. Also in the method, a ground conductor is coupled to a second terminal of the transistor. Also in the method, a control conductor is coupled to a third terminal of the transistor. Also in the method, other circuitry is provided, the other circuitry is operatively decoupled from the fiducial transistor and the other circuitry is operable without the fiducial transistor.
    Type: Application
    Filed: March 21, 2003
    Publication date: October 2, 2003
    Inventors: Steve Seidel, Simon Tam, Valluri Rao, Stefan Rusu, Richard Livengood
  • Patent number: 6528895
    Abstract: In one embodiment, the present invention includes a method including the following acts. A light source is scanned over a surface of an integrated circuit. A photo-induced current is measured from a fiducial in the integrated circuit. The current is correlated to a position of the light source as the scanning progresses.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: March 4, 2003
    Assignee: Intel Corporation
    Inventors: Paul Winer, Richard Livengood
  • Patent number: 6373572
    Abstract: In one embodiment, the present invention includes a method including the following acts. A light source is scanned over a surface of an integrated circuit. A photo-induced current is measured from a fiducial in the integrated circuit. The current is correlated to a position of the light source as the scanning progresses.
    Type: Grant
    Filed: November 30, 1999
    Date of Patent: April 16, 2002
    Assignee: Intel Corporation
    Inventors: Paul Winer, Richard Livengood
  • Publication number: 20020030805
    Abstract: In one embodiment, the present invention includes a method including the following acts. A light source is scanned over a surface of an integrated circuit. A photo-induced current is measured from a fiducial in the integrated circuit. The current is correlated to a position of the light source as the scanning progresses.
    Type: Application
    Filed: September 28, 2001
    Publication date: March 14, 2002
    Inventors: Paul Winer, Richard Livengood