Patents by Inventor Richard M. H. New
Richard M. H. New has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20080168219Abstract: Techniques for optimizing hard disk drive performance. According to one embodiment, a storage system includes a storage unit that stores data and a controller. The controller receives an idle mode indication and performs at least one operation based on the idle mode indication. According to another embodiment, a host system includes a processor and a scheduler that is operative to issues commands. The processor computes the idle mode indication, and the processor sends the idle mode indication to the storage system.Type: ApplicationFiled: June 9, 2007Publication date: July 10, 2008Applicant: Hitachi Global Storage Technologies Netherlands, B.V.Inventors: Donald Joseph Molaro, Jorge Campello de Souza, Richard M.H. New, Damien C.D. Le Moal
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Publication number: 20080168108Abstract: A system for enhancing the reliability of file systems is provided. In particular embodiments, the system includes a data storage device that includes one or more journal blocks, one or more primary metadata blocks, and one or more mirror metadata blocks. The system also includes a file system that writes metadata to the one or more journal blocks before writing the metadata to both the one or more primary metadata blocks and to the one or more mirror metadata blocks.Type: ApplicationFiled: May 18, 2007Publication date: July 10, 2008Applicant: Hitachi Global Storage Technologies Netherlands, B.V.Inventors: Donald Joseph Molaro, Jorge Campello de Souza, Richard M. H. New, Damien C. D. Le Moal
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Publication number: 20080168452Abstract: A system for enhancing command scheduling is provided. In particular embodiments, the system includes a processor and a scheduler that receives commands from the processor for accessing a storage device. The scheduler receives a set of commands, some of which have a deadline, and the scheduler is configured to determine an execution order for those commands. The scheduler is also configured to defer the execution of one or more of those commands to a later time.Type: ApplicationFiled: August 30, 2007Publication date: July 10, 2008Applicant: Hitachi Global Storage Technologies Netherlands, B.V.Inventors: Donald Joseph Molaro, Jorge Campello de Souza, Richard M. H. New, Damien C. D. Le Moal
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Publication number: 20080155680Abstract: A verifiable security mode is provided for securing data on a storage device, such as a hard disk drive. When the verifiable security mode is enabled, only authenticated accesses to data stored on the storage device are permitted after entering a password. An end user is prevented from disabling the verifiable security mode. The verifiable security mode can be set to allow or disallow an administrator from disabling the verifiable security mode. The verifiable security mode can be implemented, for example, in firmware on a hard disk drive (HDD).Type: ApplicationFiled: December 22, 2006Publication date: June 26, 2008Applicant: Hitachi Global Technologies Netherlands, B.V.Inventors: Cyril Guyot, Jorge Campello De Souza, Anand Krishnamurthi Kulkarni, Richard M.H. New
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Publication number: 20080133448Abstract: Enhancements to the functionality of a file system are provided. A file system can provide an additional level of error correction, in addition to the error correction provided by a data storage device. An extension to the metadata area in a file system can store index information about data files that the file system can use to reduce the time it takes to access the files. A file system can use extended metadata to store conditional access information for data files stored in the file system. A data storage device can also examine and characterize the data being stored in order to categorize a user's files automatically. Modules can be loaded into a file system to provide new functionality to the file system. The modules can load additional modules to extend their functionality.Type: ApplicationFiled: December 5, 2006Publication date: June 5, 2008Applicant: Hitachi Global Technologies Netherlands, B.V.Inventors: Donald Joseph Molaro, Jorge Campello de Souza, Richard M.H. New, Chunqi Han, Damien C.D. Le Moal
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Publication number: 20080130156Abstract: A disk drive that includes nonvolatile memory monitors the drive's reliability-related parameters to detect real or potential failure events, and records failure-related data in nonvolatile memory, rather than in reserved areas of the disks. The monitoring may be by running a diagnostic routine or by regular or periodic monitoring of disk drive sensors, like temperature and shock sensors. The failure events to be monitored and recorded may include defective data sectors. When a new defective sector is detected after the disk drive has been put into operation, that defective sector is taken out of service and its logical block address (LBA) is mapped to a memory space in the nonvolatile memory rather to a reserved spare sector on the disk.Type: ApplicationFiled: September 13, 2006Publication date: June 5, 2008Applicant: HITACHI GLOBAL STORAGE TECHNOLOGIES NETHERLANDS B.V.Inventors: Frank R. Chu, George A. Dunn, Richard M.H. New, Spencer W. Ng
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Publication number: 20080024899Abstract: A hybrid disk drive, i.e., a disk drive with two types of permanent storage media (conventional disk media and nonvolatile memory, such as flash memory), uses its nonvolatile memory in operational modes other than the power-save or “standby” mode wherein the disks are spun down. In a first additional mode, called a “performance” mode, one or more blocks of write data are destaged from volatile memory (the disk drive's write cache) and written to the disk and simultaneously one or more data blocks of write data are destaged from the volatile memory and written to the nonvolatile memory. In a second additional mode, called a “harsh-environment” mode, the disk drive includes one or more environmental sensors, such as temperature and humidity sensors, and the nonvolatile memory temporarily replaces the disks as the permanent storage media.Type: ApplicationFiled: July 27, 2006Publication date: January 31, 2008Applicant: HITACHI GLOBAL STORAGE TECHNOLOGIES NETHERLANDS B.V.Inventors: Frank R. Chu, Richard M.H. New, Spencer W. Ng, Motoyasu Tsunoda
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Patent number: 7318118Abstract: For non-bursty data writes, data is written to flash memory of a hard disk drive for subsequent de-staging to disk, whereas for bursty writes data is written directly to disk.Type: GrantFiled: July 14, 2005Date of Patent: January 8, 2008Assignee: Hitachi Global Storage Technologies B.V.Inventors: Frank Rui-Feng Chu, Richard M. H. New, Spencer W. Ng
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Patent number: 7137038Abstract: A RAID subsystem with a plurality of hard disk drives has each disk controller autonomously executing data scrubbing on its disks instead of requiring the RAID controller to execute data scrubbing. The data scrubbing may be interrupted upon an I/O request from the RAID controller, or it may continue if a guaranteed scrub rate is not being achieved. Data is stored in large bands of concentric data tracks, and a band may be preferentially selected for scrubbing based on frequency of reading the band, or recency of writing to the band.Type: GrantFiled: July 29, 2003Date of Patent: November 14, 2006Assignee: Hitachi Global Storage Technologies Netherlands, B.V.Inventors: Richard M. H. New, Spencer W. Ng
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Patent number: 7113555Abstract: A data channel includes a data detector that approximates both inter-symbol-interference (ISI) and random timing perturbations using a single finite-state hidden Markov model. The ISI is approximated by a finite impulse response and the timing perturbations are approximated by a first order random walk. The data signal, which is subject to inter-symbol interference and timing perturbations, is sampled periodically over a succession of time epochs without regard to timing perturbations. Timing perturbation values and data states are then assigned for each epoch, and each timing perturbation value is paired with each data state to arrive at a set of composite states. Probabilities are then assigned between composite states in successive epochs to arrive at the most probable composite state sequence corresponding to the sequence of detected data values from the sampled data. A Viterbi algorithm is then applied to find the maximum likelihood sequence of composite states.Type: GrantFiled: October 15, 2002Date of Patent: September 26, 2006Assignee: International Business Machines CorporationInventors: Jorge Campello de Souza, Brian H. Marcus, Richard M. H. New, Bruce A. Wilson
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Patent number: 7080200Abstract: In a disk drive that uses large block sizes (e.g., 4 KB) for storing data and that responds to read and write requests from a client that uses small block sizes (e.g., 512 bytes), at least the starting and ending 4K blocks of read data are cached. Since much disk data that is the subject of a write request is first read, upon a subsequent write request the drive controller determines whether the starting and ending blocks are in cache and if so, writes new data to those blocks, calculates a full ECC for them, and then calculates ECC for intervening blocks and writes new data to the intervening blocks. If both starting and ending blocks are not in cache the drive controller executes either a high data integrity routine or a high performance routine as chosen by the user.Type: GrantFiled: August 14, 2003Date of Patent: July 18, 2006Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Martin Aureliano Hassner, Richard M. H. New, Spencer W. Ng
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Patent number: 6975471Abstract: A data recording medium, such as a magnetic recording hard disk, has data tracks with pseudo-random binary sequences for the servo information used to control the position of the recording head in the disk drive. A first pseudo-random binary sequence (PRBS) and a second PRBS identical to the first PRBS but shifted by a portion of the period of the first PRBS are located between the track boundaries in alternating tracks in a first region of the servo pattern and between the track centers in alternating tracks in a second region spaced along the track from said first region. A servo decoder in the disk drive has two correlators, one for each PRBS. Each correlator outputs a dipulse when its PRBS repeats. The difference in amplitude of the dipulses represents the head position signal. The dipulses also control the amplifier for the signal read back by the head and the timing of the track identification (TID) detector.Type: GrantFiled: May 13, 2004Date of Patent: December 13, 2005Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Zvonimir Z. Bandic, Richard M. H. New, Bruce Alexander Wilson
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Patent number: 6967808Abstract: A data recording system, such as a magnetic recording hard disk drive, has a recording medium in which the data tracks have pseudo-random binary sequences for the servo information used to control the position of the recording head. A first pseudo-random binary sequence (PRBS) and a second PRBS identical to the first PRBS but shifted by a portion of the period of the first PRBS are located between the track boundaries in alternating tracks in a first region of the servo pattern and between the track centers in alternating tracks in a second region spaced along the track from said first region. A servo decoder has two correlators, one for each PRBS. Each correlator outputs a dipulse when its PRBS repeats. The difference in amplitude of the dipulses represents the head position signal. The dipulses also control the amplifier for the signal read back by the head and the timing of the track identification (TID) detector.Type: GrantFiled: May 13, 2004Date of Patent: November 22, 2005Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Zvonimir Z. Bandic, Richard M. H. New, Bruce Alexander Wilson
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Publication number: 20040071232Abstract: A data channel includes a data detector that approximates both inter-symbol-interference (ISI) and random timing perturbations using a single finite-state hidden Markov model. The ISI is approximated by a finite impulse response and the timing perturbations are approximated by a first order random walk. The data signal, which is subject to inter-symbol interference and timing perturbations, is sampled periodically over a succession of time epochs without regard to timing perturbations. Timing perturbation values and data states are then assigned for each epoch, and each timing perturbation value is paired with each data state to arrive at a set of composite states. Probabilities are then assigned between composite states in successive epochs to arrive at the most probable composite state sequence corresponding to the sequence of detected data values from the sampled data. A Viterbi algorithm is then applied to find the maximum likelihood sequence of composite states.Type: ApplicationFiled: October 15, 2002Publication date: April 15, 2004Inventors: Jorge Campello de Souza, Brian H. Marcus, Richard M. H. New, Bruce A. Wilson
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Patent number: 6708308Abstract: This invention is a Viterbi algorithm combined with the use of error filters outputs to produce bit reliabilities. The present invention is a SOVA-like method using error filters to reduce the complexity of bit reliability determination further than that of the ordinary SOVA method. Error patterns corresponding to each of a handful of dominant i.e., most common error patterns are determined from experimental data. Error filters determine likelihoods of each postulated error pattern. These likelihoods are then combined to produce bit reliabilities that may be passed on to an outer error correction decoder. The filters, typically six or seven of them, resolve most of the errors thereby simplifying computation dramatically.Type: GrantFiled: January 10, 2001Date of Patent: March 16, 2004Assignee: International Business Machines CorporationInventors: Jorge Campello De Souza, Brian H. Marcus, Richard M. H. New, Bruce A. Wilson
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Publication number: 20020129318Abstract: This invention is a Viterbi algorithm combined with the use of error filters outputs to produce bit reliabilities. The present invention is a SOVA-like method using error filters to reduce the complexity of bit reliability determination further than that of the ordinary SOVA method. Error patterns corresponding to each of a handful of dominant i.e., most common error patterns are determined from experimental data. Error filters determine likelihoods of each postulated error pattern. These likelihoods are then combined to produce bit reliabilities that may be passed on to an outer error correction decoder. The filters, typically six or seven of them, resolve most of the errors thereby simplifying computation dramatically.Type: ApplicationFiled: January 10, 2001Publication date: September 12, 2002Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jorge Campello De Souza, Brian H. Marcus, Richard M.H. New, Bruce A. Wilson
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Patent number: 6137644Abstract: A method for adaptively formatting the multiple surfaces of data storage devices such as hard drives. The method ensures that all the drives have the same total data capacity and that the capacity in each data rate is the same from drive to drive. The method includes the step of dividing the data surfaces into warm and cold surfaces using a surface quality measurement. All cold surfaces are formatted with a predetermined cold format and all warm surfaces are formatted with a predetermined warm format. The cold and warm formats have different data capacities by means of different zone layouts, a different number of error correction code bytes per data block, or different track pitches. A second embodiment uses one of three different formats for each surface: cold, nominal, or hot. The cold and hot formats are designed to be mutually compensating in terms of data capacity and each drive has an equal number of cold and hot surfaces.Type: GrantFiled: May 19, 1998Date of Patent: October 24, 2000Assignee: International Business Machines CorporationInventors: Steven R. Hetzler, Prakash Kasiraj, Richard M. H. New