Patents by Inventor Richard M. Josephs

Richard M. Josephs has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5136239
    Abstract: Apparatus for measuring hysteretic properties of thin film recording disks is provided which comprises a magnetic field generator for magnetizing a spot on a piece of magnetic material to be tested. The magnetized spot is moved past a stationary Hall effect sensor which detects the magnetic flux being emitted from the magnetized spot. The process of magnetizing and detecting the flux emitted from the same spot is repeated at different magnetization levels to provide a set of automatic measurements that are recorded in a memory of a controller processor. An analysis of the recorded data permits the automatic computation of residual flux, remanent coercivity, switching field distribution as well as other hysteretic properties.
    Type: Grant
    Filed: April 27, 1990
    Date of Patent: August 4, 1992
    Inventor: Richard M. Josephs
  • Patent number: 4816761
    Abstract: A magneto-optic Kerr effect hysteresis loop measuring apparatus is provided which employs a small relatively low weight ring magnet having a small gap and a high magnetic field strength in the deep gap and in the adjacent external gap. The spot on the product which is to be non-destructively tested is placed in the external gap field next to the small gap in a region of saturating magentic field. A laser beam having a high polarization ratio is directed along an incident path to the spot on the surface of the product to be non-destructively tested and the reflected beam is processed in a Kerr effect detector to provide hysteresis loop data which is capable of providing information sufficient to determine the squareness of the hysteresis loop and the coercivity of the material being non-destructively tested.
    Type: Grant
    Filed: June 22, 1987
    Date of Patent: March 28, 1989
    Inventor: Richard M. Josephs
  • Patent number: 4559459
    Abstract: A high gain Josephson junction logic circuit is provided. The novel circuit comprises a high gain non-linear threshold input Josephson junction logic circuit which is coupled to a high gain Josephson junction amplifier. The high gain input circuit provides the capability of driving a larger number of output circuits or employing a larger number of input signals.
    Type: Grant
    Filed: March 30, 1983
    Date of Patent: December 17, 1985
    Assignee: Sperry Corporation
    Inventors: Tsing-Chow Wang, Richard M. Josephs
  • Patent number: 4509146
    Abstract: A superconductive Josephson junction high density memory array is provided. Each memory cell in the array comprises a two branch superconducting interferometer storage loop which has only a single Josephson junction device in one of the branches. The Josephson junction devices are mounted on a substrate having a patterned ground plane. The ground plane pattern is provided with holes or apertures which surround the Josephson junction devices so that the control current of the control lines couple with the tunnel junctions of the Josephson junction devices but not with the ground plane. This structural arrangement provides a threshold characteristic for the single Josephson junction device which is symmetrical to the gate current, thus, may be easily switched to two current states indicative of two logic states.
    Type: Grant
    Filed: December 2, 1982
    Date of Patent: April 2, 1985
    Assignee: Sperry Corporation
    Inventors: Tsing-Chow Wang, Richard M. Josephs
  • Patent number: 4501975
    Abstract: A Josephson junction latch circuit is provided which has an AND gate having plural inputs and a single output. The output of the single AND gate is directly coupled to a Josephson junction flux storage loop capable of storing flux indicative of the output of the AND gate. A Josephson junction sense line is provided capable of sensing the flux condition of the flux storage loop. The sense line is directly coupled to amplifying gates which produce amplified true and complement quantities whenever the sense line is actuated.
    Type: Grant
    Filed: February 16, 1982
    Date of Patent: February 26, 1985
    Assignee: Sperry Corporation
    Inventors: Richard M. Josephs, Tsing-Chow Wang
  • Patent number: 4474828
    Abstract: A novel method of depositing the oxide barrier junction on a base electrode of a Josephson junction device is provided. An ionized oxygen plasma region is generated juxtaposed the surface of the base electrode to be oxidized. The pressure of the oxygen in the vacuum chamber is held at a predetermined high pressure where the zero voltage supercurrent is found to be independent of oxygen pressure variations and the flow of oxygen through the vacuum chamber is stabilized at the optimum minimum necessary for growth of the oxide barrier junction. The oxide barrier junctions so produced have consistent and predictable supercurrent densities.
    Type: Grant
    Filed: March 30, 1983
    Date of Patent: October 2, 1984
    Assignee: Sperry Corporation
    Inventors: Peter L. Young, Richard M. Josephs, John A. Coleman
  • Patent number: 4459823
    Abstract: An apparatus comprising a rotating substrate holder is provided. The rotating substrate holder is hollow and adapted to receive liquid gas such as nitrogen to cool the substrate to cryogenic temperatures. The novel substrate holder is supported inside of a vacuum chamber by a thin wall tube which is sealed with a liquid rotating seal at the point where it passes completely through the top wall of the vacuum chamber. The novel thin wall tube support provides access to the hollow substrate holder from outside the vacuum chamber and provides temperature isolation of the liquid in the substrate holder so that the liquid rotating seals are maintained at operable elevated temperatures.
    Type: Grant
    Filed: March 30, 1983
    Date of Patent: July 17, 1984
    Assignee: Sperry Corporation
    Inventors: Richard M. Josephs, Ronald A. Flowers, Peter L. Young
  • Patent number: 4458160
    Abstract: A single Josephson junction device is arranged in a single branch which comprises an external source resistor connected in series with an output resistor and a Josephson junction device. An input node and an input resistor are in series and connected to the node between the output resistor and the Josephson junction device. Voltage signals applied to the input voltage node are amplified by connecting a high gain voltage output in parallel with the output resistor and providing sensing means for sensing the voltage output across the output resistor only when the Josephson junction device is switching from its low impedance state to its high impedance state.
    Type: Grant
    Filed: November 19, 1981
    Date of Patent: July 3, 1984
    Assignee: Sperry Corporation
    Inventors: Richard M. Josephs, Tsing-Chow Wang
  • Patent number: 4437227
    Abstract: During the manufacture of Josephson superconducting devices, it is necessary to provide on a substrate a base electrode, a counter electrode and a small tunnel barrier area therebetween. A novel method of making all three of these active elements in the same vacuum chamber without having to remove the substrate from the vacuum chamber is provided so that the tunnel barrier area is accurately made to a predetermined size and without the danger of contamination. The novel structure is made as a substantially planarized laminate in the vacuum chamber and the tunnel barrier area is defined in a supplemental step.
    Type: Grant
    Filed: October 28, 1982
    Date of Patent: March 20, 1984
    Assignee: Sperry Corporation
    Inventors: William E. Flannery, Richard M. Josephs, Barry F. Stein, Tsing-Chow Wang, Peter L. Young
  • Patent number: 4413197
    Abstract: A Josephson junction AND gate logic circuit is provided which has an enhanced and improved operating window area. The circuit comprises two parallel branches one for the input and one for the output connected between a biasing current source and a ground or reference voltage. The input branch is provided with a first branch resistor, a third Josephson junction and an interferometer in series between the current source and ground. A plurality of input gate signal lines connects to the interferometer and a sink resistor is connected in parallel with the interferometer. When the input current signals collectively exceed a predetermined level, the two Josephson junctions in the interferometer switch ON and assume the high impedance state. The input current and biasing current is diverted into the output branch causing the second Josephson junction in the output branch to switch ON.
    Type: Grant
    Filed: August 31, 1981
    Date of Patent: November 1, 1983
    Assignee: Sperry Corporation
    Inventors: Richard M. Josephs, Tsing-Chow Wang
  • Patent number: 4413196
    Abstract: A two branch, three Josephson junction gating circuit is provided with a plurality of inputs to enable the circuit to be operated as a high-gain logic OR gate. The circuit is arranged to provide a larger operating window area and to provide an improved and optimized gain characteristic by selectively switching ON the Josephson junctions in the circuit.
    Type: Grant
    Filed: August 31, 1981
    Date of Patent: November 1, 1983
    Assignee: Sperry Corporation
    Inventors: Richard M. Josephs, Tsing-Chow Wang
  • Patent number: 4229806
    Abstract: Consecutive bit bubble memory devices employ a dummy detector element separated from the detector element. This arrangement causes substantial background magnetoresistor noise. The dummy detector of the present invention is located in a novel dummy array which minimizes the magnetoresistor noise, enhances the signal-to-noise ratio and enables the detection of bubble domains without error.
    Type: Grant
    Filed: May 29, 1979
    Date of Patent: October 21, 1980
    Assignee: Sperry Corporation
    Inventor: Richard M. Josephs
  • Patent number: 4177297
    Abstract: The disclosure teaches how binary information may be stabilized in magnetic bubble lattice devices. In bubble lattice devices, information storage is determined by the state of the domain wall structure of the bubble. Fabrication means are disclosed for stabilizing two different types of bubbles found in such films.
    Type: Grant
    Filed: February 4, 1977
    Date of Patent: December 4, 1979
    Assignee: Sperry Rand Corporation
    Inventor: Richard M. Josephs
  • Patent number: 4013803
    Abstract: The invention discloses a technique for fabricating an amorphous (i.e., non-crystalline) bubble device which enables high quality permalloy films for drive circuits and magneto-resistors to be deposited without destroying the magnetic properties of the amorphous film.
    Type: Grant
    Filed: October 30, 1975
    Date of Patent: March 22, 1977
    Assignee: Sperry Rand Corporation
    Inventor: Richard M. Josephs