Abstract: In a solar cell having p doped regions and n doped regions alternately formed in a surface of a semiconductor wafer in offset levels through use of masking and etching techniques, metal contacts are made to the p regions and n regions by first forming a base layer contacting the p doped regions and n doped regions which functions as an antireflection layer, and then forming a barrier layer, such as titanium tungsten or chromium, and a conductive layer such as copper over the barrier layer. Preferably the conductive layer is a plating layer and the thickness thereof can be increased by plating.

Abstract: A silicon solar cell having a silicon substrate includes p-type and n-type emitters on a surface of the substrate, the emitters being doped nano-particles of silicon. To reduce high interface recombination at the substrate surface, the nano-particle emitters are preferably formed over a thin interfacial tunnel oxide layer on the surface of the substrate.

Abstract: A solar cell that is readily manufactured using processing techniques which are less expensive than microelectronic circuit processing. In preferred embodiments, printing techniques are utilized in selectively forming masks for use in etching of silicon oxide and diffusing dopants and in forming metal contacts to diffused regions. In a preferred embodiment, p-doped regions and n-doped regions are alternately formed in a surface of the wafer in offset levels through use of masking and etching techniques. Metal contacts are made to the p-regions and n-regions by first forming a seed layer stack that comprises a first layer such as aluminum that contacts silicon and functions as an infrared reflector, second layer such titanium tungsten that acts as diffusion barrier, and a third layer functions as a plating base. A thick conductive layer such as copper is then plated over the seed layer, and the seed layer between plated lines is removed.

Abstract: In a solar cell having p doped regions and n doped regions alternately formed in a surface of a semiconductor wafer in offset levels through use of masking and etching techniques, metal contacts are made to the p regions and n regions by first forming a base layer contacting the p doped regions and n doped regions which functions as an antireflection layer, and then forming a barrier layer, such as titanium tungsten or chromium, and a conductive layer such as copper over the barrier layer. Preferably the conductive layer is a plating layer and the thickness thereof can be increased by plating.

Abstract: A silicon solar cell has increased efficiency by providing an anti-reflection and passivation layer comprising a layer of silicon dioxide thermally grown on a surface of a silicon body and a layer of titanium dioxide deposited on the layer of silicon oxide. In fabricating the composite anti-reflection passivation layer, a layer of aluminum is first deposited on a surface of the thermally grown silicon oxide. After annealing the aluminum layer, the aluminum is removed from the silicon dioxide layer, and the layer of titanium dioxide is then deposited on the surface of the silicon dioxide from which the aluminum was removed. A layer of magnesium fluoride can be deposited on the surface of the titanium dioxide.

Abstract: A voltage controlled thyristor includes an intrinsic layer of material between an anode and a cathode and a gate region between the intrinsic layer and the cathode comprising a lightly doped P type layer with more heavily doped P type regions extending through the lightly doped layer into the intrinsic layer. The more heavily doped P type regions are interspersed among shallower N doped regions of the cathode. In a preferred embodiment, interdigitated ohmic contacts are formed on one surface to the N doped cathode regions and the P doped regions of the control gate. In a preferred embodiment, the anode and cathode emitters have a porous construction in which a lightly doped layer or region has a more heavily doped region or regions therein.

Abstract: In a semiconductor P/N junction device, a porous emitter is provided which has high saturation current to limit injected charge when the device is conducting. The porous emitter includes a lightly doped region abutting a contact on the surface of the device to regulate minority carrier injection under forward bias and shield the contact from stand-off field when the device is not conducting. One or more heavily doped regions are provided in the first region to provide low contact resistance for the flow of majority carriers into the emitter.

Abstract: Polysilicon contacts for silicon devices such as bipolar junction transistors and silicon solar cells are fabricated in a two step anneal process to improve contact resistance and emitter saturation current density. After a silicon oxide layer is formed on a surface of a silicon substrate, a plurality of openings are formed there through to expose a plurality of contact surfaces on the surface of the silicon substrate. A thin thermally grown silicon oxide layer is then formed on the contact surfaces after which an undoped layer of polysilicon material is formed over the silicon oxide layers. The structure is then annealed at approximately 1050.degree. C. to break the thermally grown silicon oxide layer. Thereafter, a first layer of doped glass is formed over the silicon oxide surface and selectively etched to remove the first layer of glass from a first group of contact surfaces. A second layer of doped glass is then formed over the first group of contact surfaces and over the first layer of doped glass.

Abstract: The interface of a silicon oxide passivation layer and a silicon substrate in a silicon solar cell is stabilized by covering the silicon oxide passivation layer with a layer of undoped or phosphorus doped polycrystalline silicon. A second layer of silicon oxide is formed by deposition on the surface of the phosphorus doped polycrystalline and enhances the anti-reflection characteristics of the composite structure.

Abstract: A photovoltaic converter includes a photovoltaic cell and an enclosure around the cell with a reflective inner surface that reflects light to the cell. An aperture through the wall of the enclosure has a size smaller than the size of the photovaltaic cell. Light enters the enclosure through the aperture and falls upon the cell. Some light is reflected or not absorbed by the cell. This light is re-reflected back to the cell by the reflective inner surface of the enclosure. The small size of the aperture minimizes the escape of reflected light back out of the enclosure.

Abstract: Electrical isolation between cells in a dual metal layer contact solar cell or an interdigitated contact solar cell structure is provided by forming a plurality of p-n junctions in the semiconductor substrate of the structure between cells and shorting the p-n junctions by the metallization serially interconnecting adjacent cells. The shorted p-n junctions function as minority carrier traps for minority carriers flowing between the cells.

Abstract: A solar cell structure having dual metal layer contacts or interdigitated metal contact fingers on one surface is provided with internal bypass diodes in each cell. Each bypass diode comprises doped regions in contact with the metal spaced from the doped regions of the active solar cell. The doped regions of the bypass diodes are of opposite conductivity type from the doped regions of the active solar cell for each contact. The bypass diode is spaced from the active region and is shaded from irradiation during normal operation.

Abstract: A back surface point contact silicon solar cell having improved characteristics is fabricated by hydrogenating a silicon-silicon oxide interface where hydrogen atoms are diffused through silicon nitride and silicon oxide passivating layers on the surface of a silicon substrate. In carrying out the hydrogenation, the substrate and passivation layers are placed in a hydrogen atomsphere at an elevated temperature of at least 900.degree. C. whereby hydrogen atoms diffuse through the two passivation layers. Self-alignment techniques are employed in forming small-geometry doped regions in the surface of the silicon substrate for the p-n junctions of the solar cell. Openings are formed through the passivation layers to expose first surface areas on the substrate, and a doped silicon oxide layer is then formed over the passivation layers and on the exposed surface areas.

Abstract: Two bodies such as an integrated circuit and a heat sink are maintained in a low stress and high thermal conductance abutment by pressure from capillary attraction. A surface of one of the bodies is provided with grooves preferably having reentrant surfaces. A surface of the other body is brought into abutment with the grooved surface with a liquid therebetween which partially fills the grooves. The grooves act as reservoirs for excess liquid so that a minimum thickness liquid interface is achieved, and the grooves enable trapped gas to escape out the open ends thereby preventing voids between the two bodies. Importantly, the groove geometry enforces a well-defined attractive force between the two surfaces due to the liquid surface tension.

Abstract: Disclosed is a thermophotovoltaic converter which includes a parabolic cone radiation concentrator portion and a processor portion including a radiator which absorbs concentrated radiation and generates incandescent radiation. A photovoltaic cell in close proximity to the radiator receives the incandescent radiation and generates an electrical voltage. The cell includes an intrinsic or lightly doped silicon substrate having a top surface for receiving radiation and a bottom surface having a plurality of diffused N and P conductivity regions arranged in rows. A titanium-silver layer overlays the bottom surface and conductively interconnects regions of one conductivity type and provides a reflective surface to photons which pass through the substrate.