Patents by Inventor Richard M. Wyatt

Richard M. Wyatt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150016467
    Abstract: A port queue includes a first memory portion having a first memory access time and a second memory portion having a second memory access time. The first memory portion includes a cache row. The cache row includes a plurality of queue entries. A packet pointer is enqueued in the port queue by writing the packet pointer in a queue entry in the cache row in the first memory. The cache row is transferred to a packet vector in the second memory. A packet pointer is dequeued from the port queue by reading a queue entry from the packet vector stored in the second memory.
    Type: Application
    Filed: September 12, 2014
    Publication date: January 15, 2015
    Inventor: Richard M. WYATT
  • Patent number: 8837502
    Abstract: A port queue includes a first memory portion having a first memory access time and a second memory portion having a second memory access time. The first memory portion includes a cache row. The cache row includes a plurality of queue entries. A packet pointer is enqueued in the port queue by writing the packet pointer in a queue entry in the cache row in the first memory. The cache row is transferred to a packet vector in the second memory. A packet pointer is dequeued from the port queue by reading a queue entry from the packet vector stored in the second memory.
    Type: Grant
    Filed: May 9, 2012
    Date of Patent: September 16, 2014
    Assignee: Conversant Intellectual Property Management Incorporated
    Inventor: Richard M. Wyatt
  • Publication number: 20140211802
    Abstract: A multistage switch includes a matrix of coupled switch devices. A logical link comprising a plurality of physical links couples a destination through the plurality of physical links to a plurality of ports in the multistage switch. Each switch device performs trunk aware forwarding to reduce the forwarding of received frames through the matrix of coupled switch devices to the destination in order to reduce unnecessary traffic in the multistage switch.
    Type: Application
    Filed: March 27, 2014
    Publication date: July 31, 2014
    Applicant: Conversant Intellectual Property Management Incorporated
    Inventor: Richard M. WYATT
  • Patent number: 8718056
    Abstract: A multistage switch includes a matrix of coupled switch devices. A logical link comprising a plurality of physical links couples a destination through the plurality of physical links to a plurality of ports in the multistage switch. Each switch device performs trunk aware forwarding to reduce the forwarding of received frames through the matrix of coupled switch devices to the destination in order to reduce unnecessary traffic in the multistage switch.
    Type: Grant
    Filed: April 2, 2012
    Date of Patent: May 6, 2014
    Assignee: Mosaid Technologies Incorporated
    Inventor: Richard M. Wyatt
  • Publication number: 20120243411
    Abstract: A multistage switch includes a matrix of coupled switch devices. A logical link comprising a plurality of physical links couples a destination through the plurality of physical links to a plurality of ports in the multistage switch. Each switch device performs trunk aware forwarding to reduce the forwarding of received frames through the matrix of coupled switch devices to the destination in order to reduce unnecessary traffic in the multistage switch.
    Type: Application
    Filed: April 2, 2012
    Publication date: September 27, 2012
    Inventor: Richard M. Wyatt
  • Publication number: 20120219010
    Abstract: A port queue includes a first memory portion having a first memory access time and a second memory portion having a second memory access time. The first memory portion includes a cache row. The cache row includes a plurality of queue entries. A packet pointer is enqueued in the port queue by writing the packet pointer in a queue entry in the cache row in the first memory. The cache row is transferred to a packet vector in the second memory. A packet pointer is dequeued from the port queue by reading a queue entry from the packet vector stored in the second memory.
    Type: Application
    Filed: May 9, 2012
    Publication date: August 30, 2012
    Applicant: MOSAID Technologies Incorporated
    Inventor: Richard M. Wyatt
  • Patent number: 8184635
    Abstract: A port queue includes a first memory portion having a first memory access time and a second memory portion having a second memory access time. The first memory portion includes a cache row. The cache row includes a plurality of queue entries. A packet pointer is enqueued in the port queue by writing the packet pointer in a queue entry in the cache row in the first memory. The cache row is transferred to a packet vector in the second memory. A packet pointer is dequeued from the port queue by reading a queue entry from the packet vector stored in the second memory.
    Type: Grant
    Filed: August 24, 2010
    Date of Patent: May 22, 2012
    Assignee: Mosaid Technologies Incorporated
    Inventor: Richard M. Wyatt
  • Patent number: 8165117
    Abstract: A multistage switch includes a matrix of coupled switch devices. A logical link comprising a plurality of physical links couples a destination through the plurality of physical links to a plurality of ports in the multistage switch. Each switch device performs trunk aware forwarding to reduce the forwarding of received frames through the matrix of coupled switch devices to the destination in order to reduce unnecessary traffic in the multistage switch.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: April 24, 2012
    Assignee: Mosaid Technologies Incorporated
    Inventor: Richard M. Wyatt
  • Publication number: 20100325380
    Abstract: A port queue includes a first memory portion having a first memory access time and a second memory portion having a second memory access time. The first memory portion includes a cache row. The cache row includes a plurality of queue entries. A packet pointer is enqueued in the port queue by writing the packet pointer in a queue entry in the cache row in the first memory. The cache row is transferred to a packet vector in the second memory. A packet pointer is dequeued from the port queue by reading a queue entry from the packet vector stored in the second memory.
    Type: Application
    Filed: August 24, 2010
    Publication date: December 23, 2010
    Inventor: Richard M. Wyatt
  • Patent number: 7804834
    Abstract: A port queue includes a first memory portion having a first memory access time and a second memory portion having a second memory access time. The first memory portion includes a cache row. The cache row includes a plurality of queue entries. A packet pointer is enqueued in the port queue by writing the packet pointer in a queue entry in the cache row in the first memory. The cache row is transferred to a packet vector in the second memory. A packet pointer is dequeued from the port queue by reading a queue entry from the packet vector stored in the second memory.
    Type: Grant
    Filed: May 18, 2007
    Date of Patent: September 28, 2010
    Assignee: Mosaid Technologies Incorporated
    Inventor: Richard M. Wyatt
  • Publication number: 20080123528
    Abstract: A multistage switch includes a matrix of coupled switch devices. A logical link comprising a plurality of physical links couples a destination through the plurality of physical links to a plurality of ports in the multistage switch. Each switch device performs trunk aware forwarding to reduce the forwarding of received frames through the matrix of coupled switch devices to the destination in order to reduce unnecessary traffic in the multistage switch.
    Type: Application
    Filed: October 31, 2007
    Publication date: May 29, 2008
    Inventor: Richard M. Wyatt
  • Patent number: 7352760
    Abstract: In a switch with multiple physical links to a destination, data is forwarded to the destination by distributing received data across the physical links. A flow hash is selected for the received data's data flow dependent on a destination address and source address included in the received data. The flow hash selects one of the physical links to the destination for a data flow but potentially a different physical link for a different data flow, thereby forwarding the received data by distributing the received data across the physical links while maintaining frame ordering within a data flow.
    Type: Grant
    Filed: June 29, 2004
    Date of Patent: April 1, 2008
    Assignee: Mosaid Technologies, Inc.
    Inventor: Richard M. Wyatt
  • Patent number: 7313135
    Abstract: A multistage switch includes a matrix of coupled switch devices. A logical link comprising a plurality of physical links couples a destination through the plurality of physical links to a plurality of ports in the multistage switch. Each switch device performs trunk aware forwarding to reduce the forwarding of received frames through the matrix of coupled switch devices to the destination in order to reduce unnecessary traffic in the multistage switch.
    Type: Grant
    Filed: January 31, 2002
    Date of Patent: December 25, 2007
    Assignee: Mosaid Technologies, Inc.
    Inventor: Richard M. Wyatt
  • Patent number: 7236489
    Abstract: A port queue includes a first memory portion having a first memory access time and a second memory portion having a second memory access time. The first memory portion includes a cache row. The cache row includes a plurality of queue entries. A packet pointer is enqueued in the port queue by writing the packet pointer in a queue entry in the cache row in the first memory. The cache row is transferred to a packet vector in the second memory. A packet pointer is dequeued from the port queue by reading a queue entry from the packet vector stored in the second memory.
    Type: Grant
    Filed: April 27, 2000
    Date of Patent: June 26, 2007
    Assignee: MOSAID Technologies, Inc.
    Inventor: Richard M. Wyatt
  • Patent number: 6765866
    Abstract: In a switch with multiple physical links to a destination, data is forwarded to the destination by distributing received data across the physical links. A flow hash is selected for the received data's data flow dependent on a destination address and source address included in the received data. The flow hash selects one of the physical links to the destination for a data flow but potentially a different physical link for a different data flow, thereby forwarding the received data by distributing the received data across the physical links while maintaining frame ordering within a data flow.
    Type: Grant
    Filed: February 29, 2000
    Date of Patent: July 20, 2004
    Assignee: Mosaid Technologies, Inc.
    Inventor: Richard M. Wyatt
  • Publication number: 20030142668
    Abstract: A multistage switch includes a matrix of coupled switch devices. A logical link comprising a plurality of physical links couples a destination through the plurality of physical links to a plurality of ports in the multistage switch. Each switch device performs trunk aware forwarding to reduce the forwarding of received frames through the matrix of coupled switch devices to the destination in order to reduce unnecessary traffic in the multistage switch.
    Type: Application
    Filed: January 31, 2002
    Publication date: July 31, 2003
    Applicant: MOSAID Technologies, Inc.
    Inventor: Richard M. Wyatt