Abstract: A solid state drive with modular memory. The solid state drive may include a modular array of memory cards installed on a controller board, each memory card being connected to the controller board utilizing a respective connector. Redundant data, e.g., parity data, may be stored in the solid state drive, making it possible for a solid state drive controller on the controller board to restore the contents of a removed memory card (e.g., a memory card that has failed) on a replacement memory card installed in its place. The connector utilized to connect each memory card to the controller board may be an industry standard, commercial off the shelf connector, e.g., an M.2 connector; the functions of the conductors in the connector may be redefined, from the industry standard definitions, for the purposes of embodiments of the present invention.

Abstract: A solid state drive with modular memory. The solid state drive may include a modular array of memory cards installed on a controller board, each memory card being connected to the controller board utilizing a respective connector. Redundant data, e.g., parity data, may be stored in the solid state drive, making it possible for a solid state drive controller on the controller board to restore the contents of a removed memory card (e.g., a memory card that has failed) on a replacement memory card installed in its place. The connector utilized to connect each memory card to the controller board may be an industry standard, commercial off the shelf connector, e.g., an M.2 connector; the functions of the conductors in the connector may be redefined, from the industry standard definitions, for the purposes of embodiments of the present invention.

Abstract: A solid state drive with modular memory. The solid state drive may include a modular array of memory cards installed on a controller board, each memory card being connected to the controller board utilizing a respective connector. Redundant data, e.g., parity data, may be stored in the solid state drive, making it possible for a solid state drive controller on the controller board to restore the contents of a removed memory card (e.g., a memory card that has failed) on a replacement memory card installed in its place. The connector utilized to connect each memory card to the controller board may be an industry standard, commercial off the shelf connector, e.g., an M.2 connector; the functions of the conductors in the connector may be redefined, from the industry standard definitions, for the purposes of embodiments of the present invention.

Abstract: A device structure includes a printed circuit board (PCB) comprising a thermal conduction plane, at least one heat generating component thermally connected to the thermal conduction plane, and a first frame portion thermally connected to the thermal conduction plane and at least partially enclosing the at least one heat generating component. The thermal conduction plane thermally connects the at least one heat generating component to the first frame portion by way of a plurality of vias from a surface of the PCB to the thermal conduction plane.

Abstract: A solid state drive with modular memory. The solid state drive may include a modular array of memory cards installed on a controller board, each memory card being connected to the controller board utilizing a respective connector. Redundant data, e.g., parity data, may be stored in the solid state drive, making it possible for a solid state drive controller on the controller board to restore the contents of a removed memory card (e.g., a memory card that has failed) on a replacement memory card installed in its place. The connector utilized to connect each memory card to the controller board may be an industry standard, commercial off the shelf connector, e.g., an M.2 connector; the functions of the conductors in the connector may be redefined, from the industry standard definitions, for the purposes of embodiments of the present invention.

Abstract: A thermal interface material (TIM) pad is disclosed for dissipating heat from a component. The TIM pad includes a plurality of thermal interface material layers and at least one graphene layer interposed between the plurality of TIM layers. A method for forming the TIM pad includes stacking the plurality of TIM layers with at least one graphene layer interposed between the plurality of TIM layers to reach a length for the TIM pad. The stacked layers are cut corresponding to a thickness for the TIM pad for compression against the component.

Abstract: A flash controller receives a read request for reading a page of data from the flash memory from a host system, and identifies, in a cache tag table stored in the random access memory, a virtual unit address associated with the page of data. In response to identifying the virtual unit address in the cache tag table, controller determines whether a valid tag line for the page of data is associated with the virtual unit address in the cache tag table. In response to determining that the valid tag line is associated with the virtual unit address in the cache tag table, the controller reads the page of data from the random access memory in accordance with the read request and returns the read data to the host system.

Abstract: The solution described here is a modular, very high capacity SSD realization. The SSD design and modular memory elements renders the SSD both factory and field serviceable as well as facilitating just-in-time manufacturing processes. In the case of improving the factory reparability of the drive, the modular memory elements can be tested (and repaired) independent of the main SSD. This reduces costs and risks in the manufacturing and repair process. The manufacturing process is improved by allowing for the staging of elements, such as variable sized memory cards, to facilitate last minute assembly and test of the product. By separating the assembly and test of the expensive and complex main board, with its FPGA control, power and memory elements (DRAM), from the simpler memory card, the timing to delivery is improved, the risk is reduced, and inventory costs are minimized.

Abstract: A device structure includes a printed circuit board (PCB) comprising a thermal conduction plane, at least one heat generating component thermally connected to the thermal conduction plane, and a first frame portion thermally connected to the thermal conduction plane and at least partially enclosing the at least one heat generating component. The thermal conduction plane thermally connects the at least one heat generating component to the first frame portion by way of a plurality of vias from a surface of the PCB to the thermal conduction plane.

Abstract: An electronic device including a printed circuit board (PCB) including a thermal conduction plane and at least one heat generating component mounted on the PCB and connected to the thermal conduction plane. A frame is connected to the PCB so as to define a first thermally conductive path between at least a portion of the frame and the at least one heat generating component. The electronic device further includes at least one thermally conductive layer between the frame and the at least one heat generating component so as to define a second thermally conductive path between at least a portion of the frame and the at least one heat generating component.

Abstract: A method for managing a flash storage device includes initiating a read request and reading requested data from a first storage block of a plurality of storage blocks in the flash storage device based on the read request. The method further includes incrementing a read count for the first storage block and moving the data in the first storage block to an available storage block of the plurality of storage blocks when the read count reaches a first threshold value.

Abstract: A flash controller receives a read request for reading a page of data from the flash memory from a host system, and identifies, in a cache tag table stored in the random access memory, a virtual unit address associated with the page of data. In response to identifying the virtual unit address in the cache tag table, controller determines whether a valid tag line for the page of data is associated with the virtual unit address in the cache tag table. In response to determining that the valid tag line is associated with the virtual unit address in the cache tag table, the controller reads the page of data from the random access memory in accordance with the read request and returns the read data to the host system.

Abstract: A thermal interface material (TIM) pad is disclosed for dissipating heat from a component. The TIM pad includes a plurality of thermal interface material layers and at least one graphene layer interposed between the plurality of TIM layers. A method for forming the TIM pad includes stacking the plurality of TIM layers with at least one graphene layer interposed between the plurality of TIM layers to reach a length for the TIM pad. The stacked layers are cut corresponding to a thickness for the TIM pad for compression against the component.

Abstract: An electronic device including a printed circuit board (PCB) including a thermal conduction plane and at least one heat generating component mounted on the PCB and connected to the thermal conduction plane. A frame is connected to the PCB so as to define a first thermally conductive path between at least a portion of the frame and the at least one heat generating component. The electronic device further includes at least one thermally conductive layer between the frame and the at least one heat generating component so as to define a second thermally conductive path between at least a portion of the frame and the at least one heat generating component.

Abstract: A flash storage device includes a first memory, a flash memory comprising a plurality of physical blocks, each of the plurality of physical blocks comprising a plurality of physical pages, and a controller. The controller is configured to store, in the first memory, copies of data read from the flash memory, map a logical address in a read request received from a host system to a virtual unit address and a virtual page address, and check a virtual unit cache tag table stored in the first memory based on the virtual unit address. If a hit is found in the virtual unit cache tag table, a virtual page cache tag sub-table stored in the first memory is checked based on the virtual page address, wherein the virtual page cache tag sub-table is associated with the virtual unit address. If a hit is found in the virtual page cache tag sub-table, data stored in the first memory mapped to the hit in the virtual page cache tag sub-table is read in response to the read request received from the host system.

Abstract: A method for managing a flash storage device includes initiating a read request and reading requested data from a first storage block of a plurality of storage blocks in the flash storage device based on the read request. The method further includes incrementing a read count for the first storage block and moving the data in the first storage block to an available storage block of the plurality of storage blocks when the read count reaches a first threshold value.

Abstract: A method for managing a flash storage device includes initiating a read request and reading requested data from a first storage block of a plurality of storage blocks in the flash storage device based on the read request. The method further includes incrementing a read count for the first storage block and moving the data in the first storage block to an available storage block of the plurality of storage blocks when the read count reaches a first threshold value.

Abstract: A method for managing a flash storage device includes initiating a read request and reading requested data from a first storage block of a plurality of storage blocks in the flash storage device based on the read request. The method further includes incrementing a read count for the first storage block and moving the data in the first storage block to an available storage block of the plurality of storage blocks when the read count reaches a first threshold value.

Abstract: A flash storage device includes a first memory, a flash memory comprising a plurality of physical blocks, each of the plurality of physical blocks comprising a plurality of physical pages, and a controller. The controller is configured to store, in the first memory, copies of data read from the flash memory, map a logical address in a read request received from a host system to a virtual unit address and a virtual page address, and check a virtual unit cache tag table stored in the first memory based on the virtual unit address. If a hit is found in the virtual unit cache tag table, a virtual page cache tag sub-table stored in the first memory is checked based on the virtual page address, wherein the virtual page cache tag sub-table is associated with the virtual unit address. If a hit is found in the virtual page cache tag sub-table, data stored in the first memory mapped to the hit in the virtual page cache tag sub-table is read in response to the read request received from the host system.

Abstract: A flash storage device includes flash storage units that are erased in response to a condition or command while allowing the flash storage device to be used subsequent to the erase. A flash controller interface receives a command for erasing the flash storage device and provides an erase command to flash controllers in the flash storage device. Alternatively, the flash storage device detects a condition in response to which the flash controller interface provides an erase command to the flash controllers. Each flash controller independently erases a flash storage unit in response to receiving the purge command such that the flash storage units are erased substantially in parallel with each other and the erase operations overlap. Subsequent to the erase, certain control data is reconstructed to allow subsequent use of the flash storage device.