Abstract: A twinaxial cable splitter includes first and second electrical splitter conductors that are configured to be placed in electrical communication with respective first and second signal conductors of a twinaxial electrical cable at one end of the electrical splitter conductors, and are configured to be placed in electrical communication with respective first and second electrical signal conductors of first and second coaxial electrical cables. Thus, the first and second coaxial electrical cables are placed in electrical communication with the first and second electrical signal conductors, respectively, of the twinaxial cable. The twinaxial cable is in electrical communication with an IC die package. The first and second coaxial electrical cables are configured to route electrical signals to a testing device that is configured to determine certain metrics of an IC chip of the die package.

Abstract: One embodiment provides a network device that includes PHY circuitry comprising transmit circuitry (Tx) and receive circuitry (Rx), wherein the Tx and Rx circuitry are configured to be coupled to a respective channel to communicate with an external device via the channels, wherein the network device configured to communicate with the external device using an Ethernet communications protocol; and test circuitry.

Abstract: One embodiment provides a network device that includes PHY circuitry comprising transmit circuitry (Tx) and receive circuitry (Rx), wherein the Tx and Rx circuitry are configured to be coupled to a respective channel to communicate with an external device via the channels, wherein the network device configured to communicate with the external device using an Ethernet communications protocol; and test circuitry.

Abstract: One embodiment provides a network device that includes PHY circuitry comprising transmit circuitry (Tx) and receive circuitry (Rx), wherein the Tx and Rx circuitry are configured to be coupled to a respective channel to communicate with an external device via the channels, wherein the network device configured to communicate with the external device using an Ethernet communications protocol; and test circuitry.

Abstract: One embodiment provides a network device that includes PHY circuitry comprising transmit circuitry (Tx) and receive circuitry (Rx), wherein the Tx and Rx circuitry are configured to be coupled to a respective channel to communicate with an external device via the channels, wherein the network device configured to communicate with the external device using an Ethernet communications protocol; and test circuitry.

Abstract: Techniques are described that can extend the transmission rate over cable. Multiple cables can be used to increase the transmission rate. The transmission standard applied for each cable can be an Ethernet backplane standard such as IEEE 802.3ap (2007). Data can be assigned to virtual lanes prior to transmission over a cable. Forward error correction may be applied to each virtual lane prior to transmission over cable. Forward error correction may be negotiated over a single virtual lane and then applied to all virtual lanes.

Abstract: Techniques are described that can be used to extend the data transmission rate specified by 10GBASE-KR of IEEE 802.3ap (2007) to more than 10 Gb/s using a multiple lane backplane. A signal for transmission over 10 Gb/s can be divided into multiple streams for transmission over multiple lanes. Multiple transceiver pairs can be used for transmission and receipt of the multiple streams. Each transceiver pair may comply with 10GBASE-KR of IEEE 802.3ap (2007).

Abstract: Techniques are described that can extend the transmission rate over cable. Multiple cables can be used to increase the transmission rate. The transmission standard applied for each cable can be an Ethernet backplane standard such as IEEE 802.3ap (2007). Data can be assigned to virtual lanes prior to transmission over a cable. Forward error correction may be applied to each virtual lane prior to transmission over cable. Forward error correction may be negotiated over a single virtual lane and then applied to all virtual lanes.

Abstract: Techniques are described that can be used to extend the data transmission rate specified by 10GBASE-KR of IEEE 802.3ap (2007) to more than 10 Gb/s using a multiple lane backplane. A signal for transmission over 10 Gb/s can be divided into multiple streams for transmission over multiple lanes. Multiple transceiver pairs can be used for transmission and receipt of the multiple streams. Each transceiver pair may comply with 10GBASE-KR of IEEE 802.3ap (2007).

Abstract: Techniques are described that can be used to extend the data transmission rate specified by 10GBASE-KR of IEEE 802.3ap (2007) to more than 10 Gb/s using a multiple lane backplane. A signal for transmission over 10 Gb/s can be divided into multiple streams for transmission over multiple lanes. Multiple transceiver pairs can be used for transmission and receipt of the multiple streams. Each transceiver pair may comply with 10GBASE-KR of IEEE 802.3ap (2007).

Abstract: In one embodiment, the present invention includes a method communicating control information for an external adaptive equalization process for a channel coupled between a transmitter and a receiver from an external agent. In this way, the external agent may control tap settings of an equalizer based on feedback information from the receiver responsive to a data pattern generated and transmitted by the transmitter. Other embodiments are described and claimed.

Abstract: Techniques are described that can be used to extend the data transmission rate specified by 10 GBASE-KR of IEEE 802.3ap (2007) to more than 10 Gb/s using a multiple lane backplane. A signal for transmission over 10 Gb/s can be divided into multiple streams for transmission over multiple lanes. Multiple transceiver pairs can be used for transmission and receipt of the multiple streams. Each transceiver pair may comply with 10 GBASE-KR of IEEE 802.3ap (2007).

Abstract: Embodiments of the invention include a Printed Wiring Board (PWB) having a first via connected to a top-side signal source, a second via connected to a bottom-side signal destination, and a third via connected to the first via on a lower signal layer of the PWB and further connected to the second via on an upper signal layer of the PWB. In embodiments of the invention, the third via is referred to as an S-Turn via. The S-Turn PWB routing configuration advantageously reduces reflections causes by via stubs at Multi-Giga Hertz (MGH) frequencies. Other embodiments are described.

Abstract: In one embodiment, the present invention includes a method communicating control information for an external adaptive equalization process for a channel coupled between a transmitter and a receiver from an external agent. In this way, the external agent may control tap settings of an equalizer based on feedback information from the receiver responsive to a data pattern generated and transmitted by the transmitter. Other embodiments are described and claimed.

Abstract: In some embodiments, an circuit card includes an electronic circuit substrate, a ground plane on the electronic circuit substrate, first and second differential signal pads on the electronic circuit substrate, a ground return signal pad associated with the first and second differential signal pads, the ground return signal pad being connected to the ground plane on the electronic substrate, and a cutout structure on the ground plane positioned near a location where the ground return signal pad connects to the ground plane, wherein the cutout structure is configured to direct a ground return path associated with the first and second differential signal pads to the ground return signal pad associated with the first and second differential signal pads. Other embodiments are disclosed and claimed.

Abstract: In some embodiments common mode equalization is performed on a received differential signal to produce a voltage signal that is proportional to a common mode voltage of the differential signal. A command signal is provided in response to the common mode equalization to adjust a delay between two pairs of the differential signal. Other embodiments are described and claimed.

Abstract: In some embodiments, an circuit card includes an electronic circuit substrate, a ground plane on the electronic circuit substrate, first and second differential signal pads on the electronic circuit substrate, a ground return signal pad associated with the first and second differential signal pads, the ground return signal pad being connected to the ground plane on the electronic substrate, and a cutout structure on the ground plane positioned near a location where the ground return signal pad connects to the ground plane, wherein the cutout structure is configured to direct a ground return path associated with the first and second differential signal pads to the ground return signal pad associated with the first and second differential signal pads. Other embodiments are disclosed and claimed.

Abstract: A serial communications link includes a plurality of projections disposed on a reference channel. The projections may be disposed at predetermined angles relative to a signal propagation axis of the reference channel, and may be spaced to tune the reference channel to a predetermined jitter profile based on a data rate through the channel.

Abstract: A reference channel is coupled to a device under test and measurements are made at the output of the reference channel.