Abstract: A monolithic capacitor chip includes a first electrode layer enclosed in a ceramic which comprises a ceramic layer. The first electrode is on one side of the ceramic layer. A second electrode is formed as a pad for contact with the other side of the ceramic layer. In one embodiment of the present invention, the first electrode is accessed electrically by way of an end cap. In another embodiment the first electrode is accessed electrically by way of a conductive via through the ceramic layer.

Abstract: A capacitor includes a planar electrode layer which is mounted between a pair of dielectric layers. The electrode layer generally is centered inwardly with respect to the dielectric layers leaving an outward margin of dielectric material. One of the dielectric layers has two spaced apart contact members, each having a different polarity from the other. The electrode layer is isolated from electrical contact with any conductor and is buried within the dielectric layers. The electrode layer, in combination with the dielectric layer on which the contact members are mounted and the contact members, allow development of a selected value of capacitance between the contact members. Providing trimmed contact members as well as controlling their size and spacing allow for convenient preselection of desired operative characteristics of the capacitor. The contact members could be positioned on a substrate to which a buried electrode is mounted.