Patents by Inventor Richard Mourn

Richard Mourn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230229536
    Abstract: A method for quickly testing an electrical connection used between two nodes. For example, the method can be used with an IEEE-1394-2008 Beta serial bus. The testing is used to determine if a disconnect signal is a permanent disconnect signal or a temporary disconnect signal. Also, the testing provides for a fast reconnect that attempts one or more times to determine a temporary disconnect, thus creating a range in microseconds to milliseconds in which to verify the temporary disconnect. Also, the number of attempts can be replaced by a certain time period.
    Type: Application
    Filed: March 22, 2023
    Publication date: July 20, 2023
    Inventor: Richard Mourn
  • Patent number: 9882739
    Abstract: A method for disabling or removing a Legacy loop detect circuit to eliminate the circuit erroneously detecting a legacy loop during a IEEE-1394 serial bus initialization. The method includes providing a programmable code to the Legacy loop detect circuit for increasing a reset count to a value greater than three (3) to the Legacy loop circuit thus reducing the probability of an erroneous disconnect of a Beta node connection. This method provides for more robust Beta loop node operation during high frequency bus resets.
    Type: Grant
    Filed: August 30, 2016
    Date of Patent: January 30, 2018
    Assignee: DAP Holding B.U.
    Inventor: Richard Mourn
  • Patent number: 9747186
    Abstract: A method of delaying or blocking new bus resets from propagating while a previous bus initialization (bus reset, tree-id or self-id) is in process during the performance of a IEEE-1394 serial bus. The method provides for more robust Beta only bus operation during high frequency bus resets. The bus resets are caused by noise events, power-up and power-down sequences and other bus reset causing events.
    Type: Grant
    Filed: December 29, 2014
    Date of Patent: August 29, 2017
    Inventor: Richard Mourn
  • Patent number: 9602302
    Abstract: A method for disabling or removing a Legacy loop detect circuit to eliminate the circuit erroneously detecting a legacy loop during a IEEE-1394 serial bus initialization. The method includes providing a programmable code to the Legacy loop detect circuit for increasing a reset count to a value greater than three (3) to the Legacy loop circuit thus reducing the probability of an erroneous disconnect of a Beta node connection. This method provides for more robust Beta loop node operation during high frequency bus resets.
    Type: Grant
    Filed: June 17, 2014
    Date of Patent: March 21, 2017
    Assignee: DAP Holding B.U.
    Inventor: Richard Mourn
  • Patent number: 9575866
    Abstract: A Sub-Diagnostic Module incorporated into a System Module. The Sub-Diagnostic Module receives signals from the System Modules through the diagnostic signal interface. The diagnostic signal interface passes the signals through to the diagnostic signal evaluation logic where it determines if a signal or combination of signals is an event to be recorded in the sub-diagnostic registers and/or the sub-diagnostic log memory. The events recorded in the registers and log memory are accessed by the Portable Diagnostic Module through the Sub-Diagnostic Module's diagnostic protocol interface. Recorded events placed in log memory are synchronized by the sub-diagnostic time synchronizer. The time synchronizer receives high resolution time information from a local clock, such as a physical layer clock, and lower resolution network synchronized information from the diagnostic protocol interface.
    Type: Grant
    Filed: November 6, 2014
    Date of Patent: February 21, 2017
    Assignee: DAP Holding B.V.
    Inventor: Richard Mourn
  • Publication number: 20160371223
    Abstract: A method for disabling or removing a Legacy loop detect circuit to eliminate the circuit erroneously detecting a legacy loop during a IEEE-1394 serial bus initialization. The method includes providing a programmable code to the Legacy loop detect circuit for increasing a reset count to a value greater than three (3) to the Legacy loop circuit thus reducing the probability of an erroneous disconnect of a Beta node connection. This method provides for more robust Beta loop node operation during high frequency bus resets.
    Type: Application
    Filed: August 30, 2016
    Publication date: December 22, 2016
    Inventor: Richard Mourn
  • Patent number: 7783812
    Abstract: The present invention is directed to a serial bus extension that provides for a new class of 1394 devices called versaphy devices. A versaphy device has a static (permanent or semi-permanent) address or versaphy label. In addition, the versaphy device has a new register structure called a versaphy register. The versaphy register may contain the versaphy label. The versaphy register can be written to by non-local devices such a controller. New simple versaphy packets are defined to facilitate communication between a versaphy device and a controller. The versaphy device can transmit unsolicited responses. These features reduce the complexity necessary for a device to connect to a 1394 bus and, therefore, reduce the cost of these devices.
    Type: Grant
    Filed: November 27, 2007
    Date of Patent: August 24, 2010
    Assignee: Astek, Inc
    Inventors: Richard Mourn, Barry Walker, Jr.
  • Publication number: 20080126654
    Abstract: The present invention is directed to a serial bus extension that provides for a new class of 1394 devices called versaphy devices. A versaphy device has a static (permanent or semi-permanent) address or versaphy label. In addition, the versaphy device has a new register structure called a versaphy register. The versaphy register may contain the versaphy label. The versaphy register can be written to by non-local devices such a controller. New simple versaphy packets are defined to facilitate communication between a versaphy device and a controller. The versaphy device can transmit unsolicited responses. These features reduce the complexity necessary for a device to connect to a 1394 bus and, therefore, reduce the cost of these devices.
    Type: Application
    Filed: November 27, 2007
    Publication date: May 29, 2008
    Inventors: Richard Mourn, Barry Walker