Patents by Inventor Richard N. Chamberlain

Richard N. Chamberlain has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10365963
    Abstract: Embodiments described herein provide a method, system, and computer readable medium configured to analyze a heap following a core dump is disclosed herein. The method begins by generating the core dump responsive to an occurrence of an event in a run-time environment. The core dump contains the contents of a heap at a moment in time that the event occurred. The processor analyzes the heap in the run-time environment using a first heap analysis method at a first starting point in the heap. The heap includes one or more slots. Each slot contains one or more objects. The processor analyzes the contents of the heap specified by the core dump using a second heap analysis method at a second starting point in the heap, responsive to determining that a first slot is not reachable.
    Type: Grant
    Filed: January 16, 2017
    Date of Patent: July 30, 2019
    Assignee: International Business Machines Corporation
    Inventors: Richard N. Chamberlain, Howard J. Hellyer, Adam J. Pilkington
  • Publication number: 20180203753
    Abstract: Embodiments described herein provide a method, system, and computer readable medium configured to analyze a heap following a core dump is disclosed herein. The method begins by generating the core dump responsive to an occurrence of an event in a run-time environment. The core dump contains the contents of a heap at a moment in time that the event occurred. The processor analyzes the heap in the run-time environment using a first heap analysis method at a first starting point in the heap. The heap includes one or more slots. Each slot contains one or more objects. The processor analyzes the contents of the heap specified by the core dump using a second heap analysis method at a second starting point in the heap, responsive to determining that a first slot is not reachable.
    Type: Application
    Filed: January 16, 2017
    Publication date: July 19, 2018
    Inventors: Richard N. CHAMBERLAIN, Howard J. HELLYER, Adam J. PILKINGTON
  • Patent number: 9870400
    Abstract: Analyzing a managed runtime cache is provided. A heap associated with a managed runtime environment, where the heap includes an N-generation cache or a plurality of objects associated with a program operating within a managed runtime environment is identified. A snapshot of the heap is produced, wherein the snapshot identifies a memory location for each object of the plurality of objects at which the object is stored. A generation of each of the plurality of objects based, at least in part, on the memory location of the object is determined. One or more suggestions based, at least in part, on the memory location of the plurality of objects is provided.
    Type: Grant
    Filed: August 4, 2015
    Date of Patent: January 16, 2018
    Assignee: International Business Machines Corporation
    Inventors: Richard N. Chamberlain, Howard J. Hellyer, Matthew F. Peters, Adam J. Pilkington
  • Patent number: 9734204
    Abstract: Analyzing a managed runtime cache is provided. A heap associated with a managed runtime environment, where the heap includes an N-generation cache or a plurality of objects associated with a program operating within a managed runtime environment is identified. A snapshot of the heap is produced, wherein the snapshot identifies a memory location for each object of the plurality of objects at which the object is stored. A generation of each of the plurality of objects based, at least in part, on the memory location of the object is determined. One or more suggestions based, at least in part, on the memory location of the plurality of objects is provided.
    Type: Grant
    Filed: December 11, 2014
    Date of Patent: August 15, 2017
    Assignee: International Business Machines Corporation
    Inventors: Richard N. Chamberlain, Howard J. Hellyer, Matthew F. Peters, Adam J. Pilkington
  • Patent number: 9720807
    Abstract: A list of classes found in a core dump file is determined. One or more classes requested by a classloader is also determined. A set of one or more classes requested by the classloader that are found in the core dump file is then determined.
    Type: Grant
    Filed: January 6, 2017
    Date of Patent: August 1, 2017
    Assignee: International Business Machines Corporation
    Inventors: Richard N. Chamberlain, Howard J. Hellyer, Matthew F. Peters, Adam J. Pilkington
  • Publication number: 20170116105
    Abstract: A list of classes found in a core dump file is determined. One or more classes requested by a classloader is also determined. A set of one or more classes requested by the classloader that are found in the core dump file is then determined.
    Type: Application
    Filed: January 6, 2017
    Publication date: April 27, 2017
    Inventors: Richard N. Chamberlain, Howard J. Hellyer, Matthew F. Peters, Adam J. Pilkington
  • Publication number: 20170091067
    Abstract: A list of classes found in a core dump file is determined. One or more classes requested by a classloader is also determined. A set of one or more classes requested by the classloader that are found in the core dump file is then determined.
    Type: Application
    Filed: September 28, 2015
    Publication date: March 30, 2017
    Inventors: Richard N. Chamberlain, Howard J. Hellyer, Matthew F. Peters, Adam J. Pilkington
  • Patent number: 9588873
    Abstract: A list of classes found in a core dump file is determined. One or more classes requested by a classloader is also determined. A set of one or more classes requested by the classloader that are found in the core dump file is then determined.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: March 7, 2017
    Assignee: International Business Machines Corporation
    Inventors: Richard N. Chamberlain, Howard J. Hellyer, Matthew F. Peters, Adam J. Pilkington
  • Patent number: 9542299
    Abstract: A method, apparatus, computer program and computer program product for processing core data produced by a computer process to identify data relevant to the computer process, the method comprising the steps of: identifying core data for a computer process; identifying trace data comprising sequential trace entries for the computer process; selecting a predetermined number of most recent entries in the trace data; identifying any references to a memory address in each selected trace data entry; dereferencing each identified memory address in the core data; and extracting the data from the dereferenced memory location in the core data.
    Type: Grant
    Filed: October 3, 2013
    Date of Patent: January 10, 2017
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Richard N. Chamberlain, Howard J. Hellyer, Matthew F. Peters, Adam J. Pilkington
  • Patent number: 9430415
    Abstract: A method for managing concurrent system dumps of address spaces of memory of a computing system. The method comprises analyzing address space of memory to determine high priority areas and low priority areas of the address space. The method further comprises stopping all application threads of memory. In addition, the method further comprises performing a system dump of all the high priority areas of the address space. Moreover, the method further comprises initiating a background thread that performs a system dump of the low priority areas in background of the address space, and allowing, by the one or more computer processors, all of the application threads of memory to restart.
    Type: Grant
    Filed: June 14, 2013
    Date of Patent: August 30, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Richard N. Chamberlain, Howard J. Hellyer, Matthew F. Peters, Adam J. Pilkington
  • Publication number: 20160170876
    Abstract: Analyzing a managed runtime cache is provided. A heap associated with a managed runtime environment, where the heap includes an N-generation cache or a plurality of objects associated with a program operating within a managed runtime environment is identified. A snapshot of the heap is produced, wherein the snapshot identifies a memory location for each object of the plurality of objects at which the object is stored. A generation of each of the plurality of objects based, at least in part, on the memory location of the object is determined. One or more suggestions based, at least in part, on the memory location of the plurality of objects is provided.
    Type: Application
    Filed: August 4, 2015
    Publication date: June 16, 2016
    Inventors: Richard N. Chamberlain, Howard J. Hellyer, Matthew F. Peters, Adam J. Pilkington
  • Publication number: 20160170875
    Abstract: Analyzing a managed runtime cache is provided. A heap associated with a managed runtime environment, where the heap includes an N-generation cache or a plurality of objects associated with a program operating within a managed runtime environment is identified. A snapshot of the heap is produced, wherein the snapshot identifies a memory location for each object of the plurality of objects at which the object is stored. A generation of each of the plurality of objects based, at least in part, on the memory location of the object is determined. One or more suggestions based, at least in part, on the memory location of the plurality of objects is provided.
    Type: Application
    Filed: December 11, 2014
    Publication date: June 16, 2016
    Inventors: Richard N. Chamberlain, Howard J. Hellyer, Matthew F. Peters, Adam J. Pilkington
  • Patent number: 9141453
    Abstract: A method for creating diagnostic files that includes receiving an error notification indicating that an error has occurred in a particular system section of a system that has a plurality of system sections. The error notification includes information about the error. A diagnostic file that includes a summarized error report of the particular system section is created based on the information included in the error notification. The diagnostic file is saved.
    Type: Grant
    Filed: December 10, 2012
    Date of Patent: September 22, 2015
    Assignee: International Business Machines Corporation
    Inventors: Richard N. Chamberlain, Blazej Czapp, Howard Hellyer, Matthew F. Peters, Adam J. Pilkington
  • Publication number: 20150100834
    Abstract: A method, apparatus, computer program and computer program product for processing core data produced by a computer process to identify data relevant to the computer process, the method comprising the steps of: identifying core data for a computer process; identifying trace data comprising sequential trace entries for the computer process; selecting a predetermined number of most recent entries in the trace data; identifying any references to a memory address in each selected trace data entry; dereferencing each identified memory address in the core data; and extracting the data from the dereferenced memory location in the core data.
    Type: Application
    Filed: October 3, 2013
    Publication date: April 9, 2015
    Applicant: International Business Machines Corporation
    Inventors: Richard N. Chamberlain, Howard J. Hellyer, Matthew F. Peters, Adam J. Pilkington
  • Publication number: 20140372712
    Abstract: A method for managing concurrent system dumps of address spaces of memory of a computing system. The method comprises analyzing address space of memory to determine high priority areas and low priority areas of the address space. The method further comprises stopping all application threads of memory. In addition, the method further comprises performing a system dump of all the high priority areas of the address space. Moreover, the method further comprises initiating a background thread that performs a system dump of the low priority areas in background of the address space, and allowing, by the one or more computer processors, all of the application threads of memory to restart.
    Type: Application
    Filed: June 14, 2013
    Publication date: December 18, 2014
    Inventors: Richard N. Chamberlain, Howard J. Hellyer, Matthew F. Peters, Adam J. Pilkington
  • Publication number: 20140344628
    Abstract: One embodiment of the present invention discloses a method, computer program product, and system for conditioning a memory region. An exemplary embodiment determines an anticipated form of an object. An exemplary embodiment determines a memory region for the object. An exemplary embodiment encodes the anticipated form of the object. An exemplary embodiment inserts the encoding of the anticipated form of the object into the memory region for the object. An exemplary embodiment acquires the object. An exemplary embodiment determines a form of the object. An exemplary embodiment compares the form of the object with the anticipated form of the object. An exemplary embodiment indicates an error if the form of the object differs from the anticipated form of the object.
    Type: Application
    Filed: May 14, 2013
    Publication date: November 20, 2014
    Applicant: International Business Machines Corporation
    Inventors: Richard N. Chamberlain, Howard J. Hellyer, Matthew F. Peters, Adam J. Pilkington