Abstract: A signal computing bus (SCbus) includes two bus structures: (a) a synchronous TDM data transport referred to as a data bus and (b) a serial message passing bus referred to as a message bus. The following three groups of functions are performed using the SCbus: (a) data transport over the data bus, (b) message passing over the message bus, and (c) data and message bus control. In a preferred embodiment, the data bus utilizes: 2 clocks, 1 frame pulse, 16 data busses, and 1 clock control (the clock control signal enables access to the bus and automatic switching from one clock master to another when an error is detected) and the message bus is fabricated using a master HDLC protocol with contention resolution.

Abstract: TDM bus and, in particular, a PCM Expansion Bus (PEB): (a) which permits a multiplicity of apparatus to monitor a TDM signal simultaneously and (b) wherein various timing and control signals are provided in a manner that minimizes the hardware needed by the apparatus for identifying, i.e., decoding, various channels in the TDM signal for accessing and inserting information therein.