Abstract: A hardware accelerator for neural network applications can include an image-to-column block and a general matrix-matrix multiplication (GEMM) block. The image-to-column block includes an input controller coupled to receive an input feature map from a memory block; a series of patch units configured in a ring network and coupled to the input controller to receive new elements of the input feature map; and an output controller coupled to receive each output patch from the series of patch units. The GEMM block can be a dynamically reconfigurable unit that can be configured as a tall array or individual square arrays. The described hardware accelerator can handle sparsity in both the feature map inputs (output from the image-to-column block) and the filter/weight inputs to the GEMM block.

Abstract: A method for determining the position in a vehicle of a first device in communication with a microprocessor may include receiving, at the microprocessor, a first set of inertial data from at least one sensor of the first device; receiving, at the microprocessor, a second set of inertial data from at least one sensor of a reference device disposed within the vehicle; and determining, using the microprocessor, the position of the first device in the vehicle by comparing the first set of inertial data with the second set of inertial data.

Abstract: A method of tracking a service queue using a single-point signal monitor in which at least one customer carries a wireless device may include: receiving a received signal strength from the wireless device as a trace; identify first segments of the trace containing mostly positive sloped received signal strength; identify second segments of the trace containing mostly negative sloped received signal; extract attributes from the first and second segments as child variables for two parent nodes in a Bayesian Network in which the two parent nodes respectively model a beginning of service and a leaving period for a service queue; and inputting the extracted attributes into Bayesian Network; and determining a beginning of service and leaving period using the Bayesian Network. The method may also include determining critical time points in a trace using a K-L divergence technique.

Abstract: A method of tracking a service queue using a single-point signal monitor in which at least one customer carries a wireless device may include: receiving a received signal strength from the wireless device as a trace; identify first segments of the trace containing mostly positive sloped received signal strength; identify second segments of the trace containing mostly negative sloped received signal; extract attributes from the first and second segments as child variables for two parent nodes in a Bayesian Network in which the two parent nodes respectively model a beginning of service and a leaving period for a service queue; and inputting the extracted attributes into Bayesian Network; and determining a beginning of service and leaving period using the Bayesian Network. The method may also include determining critical time points in a trace using a K-L divergence technique.

Abstract: A method of tracking a service queue using a single-point signal monitor in which at least one customer carries a wireless device may include: receiving a received signal strength from the wireless device as a trace; identify first segments of the trace containing mostly positive sloped received signal strength; identify second segments of the trace containing mostly negative sloped received signal; extract attributes from the first and second segments as child variables for two parent nodes in a Bayesian Network in which the two parent nodes respectively model a beginning of service and a leaving period for a service queue; and inputting the extracted attributes into Bayesian Network; and determining a beginning of service and leaving period using the Bayesian Network. The method may also include determining critical time points in a trace using a K-L divergence technique.

Abstract: A method for determining the position in a vehicle of a first device in communication with a microprocessor may include receiving, at the microprocessor, a first set of inertial data from at least one sensor of the first device; receiving, at the microprocessor, a second set of inertial data from at least one sensor of a reference device disposed within the vehicle; and determining, using the microprocessor, the position of the first device in the vehicle by comparing the first set of inertial data with the second set of inertial data.

Abstract: A method of tracking a service queue using a single-point signal monitor in which at least one customer carries a wireless device may include: receiving a received signal strength from the wireless device as a trace; identify first segments of the trace containing mostly positive sloped received signal strength; identify second segments of the trace containing mostly negative sloped received signal; extract attributes from the first and second segments as child variables for two parent nodes in a Bayesian Network in which the two parent nodes respectively model a beginning of service and a leaving period for a service queue; and inputting the extracted attributes into Bayesian Network; and determining a beginning of service and leaving period using the Bayesian Network. The method may also include determining critical time points in a trace using a K-L divergence technique.

Abstract: A method for determining the position in a vehicle of a first device in communication with a microprocessor may include receiving, at the microprocessor, a first set of inertial data from at least one sensor of the first device; receiving, at the microprocessor, a second set of inertial data from at least one sensor of a reference device disposed within the vehicle; and determining, using the microprocessor, the position of the first device in the vehicle by comparing the first set of inertial data with the second set of inertial data.

Abstract: A method of tracking a service queue using a single-point signal monitor in which at least one customer carries a wireless device may include: receiving a received signal strength from the wireless device as a trace; identify first segments of the trace containing mostly positive sloped received signal strength; identify second segments of the trace containing mostly negative sloped received signal; extract attributes from the first and second segments as child variables for two parent nodes in a Bayesian Network in which the two parent nodes respectively model a beginning of service and a leaving period for a service queue; and inputting the extracted attributes into Bayesian Network; and determining a beginning of service and leaving period using the Bayesian Network. The method may also include determining critical time points in a trace using a K-L divergence technique.

Abstract: A method of tracking a service queue using a single-point signal monitor in which at least one customer carries a wireless device may include: receiving a received signal strength from the wireless device as a trace; identify first segments of the trace containing mostly positive sloped received signal strength; identify second segments of the trace containing mostly negative sloped received signal; extract attributes from the first and second segments as child variables for two parent nodes in a Bayesian Network in which the two parent nodes respectively model a beginning of service and a leaving period for a service queue; and inputting the extracted attributes into Bayesian Network; and determining a beginning of service and leaving period using the Bayesian Network. The method may also include determining critical time points in a trace using a K-L divergence technique.

Abstract: A method for determining the position in a vehicle of a first device in communication with a microprocessor may include receiving, at the microprocessor, a first set of inertial data from at least one sensor of the first device; receiving, at the microprocessor, a second set of inertial data from at least one sensor of a reference device disposed within the vehicle; and determining, using the microprocessor, the position of the first device in the vehicle by comparing the first set of inertial data with the second set of inertial data.

Abstract: An adaptive voltage scaling system includes first and second devices. Each of the first and second devices includes at least one master serial interface port and at least one slave serial interface port. The first device is operatively coupled to a voltage regulator, and the slave serial interface port associated with the second device is operatively coupled to the master serial interface port associated with the first device. The first device controls the voltage regulator based on information obtained from the first and second devices using the master serial interface port associated with the first device and the slave serial interface port associated with the second device. The first and second devices receive voltage from the voltage regulator. A corresponding method and computer-readable medium are also disclosed.

Abstract: An integrated circuit having a monitor circuit for monitoring timing in a critical path having a target timing margin is disclosed. The monitor circuit has two shift registers, one of which includes a delay element that applies a delay value to a received signal. The inputs to the two shift registers form a signal input node capable of receiving an input signal. The monitor circuit also has a logic gate having an output and at least two inputs, each input connected to a corresponding one of the outputs of the two shift registers. The output of the logic gate indicates whether the target timing margin is satisfied or not satisfied.

Abstract: An integrated circuit implements a transistor aging effects sensor comprising first and second delay lines, each comprising a plurality of delay elements, and a register. The register comprises a plurality of flip-flops having data inputs driven by respective outputs of respective ones of the delay elements of the first delay line and clock inputs driven by one or more clock signals provided by at least one of the delay elements of the second delay line. Data outputs of the flip-flops of the register are indicative of one or more aging effects in transistors of the first and second delay lines. For example, the register may comprise a thermometer encoded register providing digital output signals used to determine aging effects in the transistors of the first and second delay lines. Embodiments can be implemented using differential delay lines or delay lines comprising respective inverter chains.

Abstract: An integrated circuit implements a transistor mismatch sensor comprising first and second inverter chains coupled to a register. The register comprises a plurality of flip-flops having clock inputs driven by an output of the first inverter chain and data inputs driven by an output of the second inverter chain. Data outputs of the flip-flops of the register are indicative of an amount of mismatch between transistors of different conductivity types in the first and second inverter chains. For example, the register may comprise a thermometer encoded register providing a digital output signal having a first value indicative of an approximate match in speed, drive strength or other characteristics between the transistors of the first and second conductivity types, with values above and below the first value being indicative of respective first and second different types of relative mismatch in speed, drive strength or other characteristics.

Abstract: An adaptive voltage scaling system includes first and second devices. Each of the first and second devices includes at least one master serial interface port and at least one slave serial interface port. The first device is operatively coupled to a voltage regulator, and the slave serial interface port associated with the second device is operatively coupled to the master serial interface port associated with the first device. The first device controls the voltage regulator based on information obtained from the first and second devices using the master serial interface port associated with the first device and the slave serial interface port associated with the second device. The first and second devices receive voltage from the voltage regulator. A corresponding method and computer-readable medium are also disclosed.

Abstract: An integrated circuit having a monitor circuit for monitoring timing in a critical path having a target timing margin is disclosed. The monitor circuit has two shift registers, one of which includes a delay element that applies a delay value to a received signal. The inputs to the two shift registers form a signal input node capable of receiving an input signal. The monitor circuit also has a logic gate having an output and at least two inputs, each input connected to a corresponding one of the outputs of the two shift registers. The output of the logic gate indicates whether the target timing margin is satisfied or not satisfied.

Abstract: Operational speed of an integrated circuit chip is measured using one or more speed measurement elements, such as ring oscillators, disposed at various regions of the chip. Each speed measuring element can include several ring oscillators, each corresponding to a different technology threshold voltage. The speed measurement data collected from the speed measurement elements can be used to determine on-chip variation (OCV). Circuitry either on the chip itself or, alternatively, external to the chip can adjust a chip operational parameter, such as core voltage or clock speed, in response to the speed measurement data. Speed measurement data can be read out of the chip through JTAG pins or an interface to an external host.

Abstract: A secure memory system and a method of maintaining the security of memory contents. One embodiment of the system includes: (1) a security control module configured to transmit a system memory secure mode signal and processor secure mode signal to place the system in a secure mode, (2) a secure memory bridge coupled to the security control and system memory and configured to encrypt and decrypt data associated with the system memory based on a state of the system memory secure mode signal and (3) a boot processor coupled to the security control module and the secure memory bridge and configured to transmit requests to the secure memory bridge in the secure mode and an unsecure mode.

Abstract: Techniques for enhancing the performance of an IC are provided. A method of enhancing IC performance includes the steps of: associating at least one performance result of at least one performance monitor, formed on the IC, with deterministic combinations of IC performance and a processing parameter, a supply voltage, and/or a temperature of the IC; determining an IC processing characterization of the IC as a function of the performance result for at least one prescribed supply voltage and temperature of the IC, the IC processing characterization being indicative of a type of processing received by the IC during fabrication of the IC; and controlling a voltage supplied to at least a portion of the IC, the voltage being controlled as a function of the IC processing characterization and/or the temperature of the IC so as to satisfy at least one prescribed performance parameter of the IC.