Patents by Inventor Richard Pommer
Richard Pommer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6910812Abstract: An integrated circuit/optoelectronic packaging system (100) which comprises OE and IC components packaged to provide electrical input/output, thermal management, an optical window, and precise passive or mechanical alignment to external optical receivers or transmitters. A transparent insulating substrate having electrical circuitry in a thin silicon layer formed on its top side is positioned between the optical fiber and the optoelectronic device such that an optical path is described between the optoelectronic device and the optical fiber core through the transparent insulating substrate. The optoelectronic devices are mounted on the transparent insulating substrate in a precise positional relationship to guide holes in the substrate. The optical fibers are fixed in an optical fiber connector and are held in a precise positional relationship to guide holes in the connector.Type: GrantFiled: May 15, 2002Date of Patent: June 28, 2005Assignee: Peregrine Semiconductor CorporationInventors: Richard Pommer, Charles B. Kuznia, Tri Q. Le, Richard T. Hagen, Ronald E. Reedy, James S. Cable, Donald J. Albares, Mark Miscione
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Publication number: 20040124534Abstract: Methods and apparatus for increasing the yield achieved during high density interconnect (HDI) production. In particular, processes in which panels are tested to identify good cells/parts, good cells are removed from the panels, and new panels created entirely of identified/known good cells allow increases in the number of layers used in a HDI without incurring the decrease in yield normally associated with such a layering process.Type: ApplicationFiled: June 12, 2003Publication date: July 1, 2004Inventors: Richard Pommer, Simon McElrea, Brad Banister
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Patent number: 6673190Abstract: This invention concerns lasable bond-ply materials comprising a nonwoven reinforcing material and at least one resin material. The present invention also includes methods for using the bond-ply of this invention to manufacture high density multilayer printed wiring boards.Type: GrantFiled: April 4, 2001Date of Patent: January 6, 2004Assignee: Honeywell International Inc.Inventors: David Haas, Chengzeng Xu, Mavyn McAuliffe, Scott Zimmerman, Laura Miller, Meifang Qin, Baopei Xu, Richard Pommer
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Publication number: 20030201462Abstract: An integrated circuit/optoelectronic packaging system (100) which comprises OE and IC components packaged to provide electrical input/output, thermal management, an optical window, and precise passive or mechanical alignment to external optical receivers or transmitters. A transparent insulating substrate having electrical circuitry in a thin silicon layer formed on its top side is positioned between the optical fiber and the optoelectronic device such that an optical path is described between the optoelectronic device and the optical fiber core through the transparent insulating substrate. Arrays of fibers may be coupled to arrays of optoelectronic devices through a single transparent substrate. The optoelectronic devices are mounted on the transparent insulating substrate in a precise positional relationship to guide holes in the substrate. The optical fibers are fixed in an optical fiber connector and are held in a precise positional relationship to guide holes in the connector.Type: ApplicationFiled: May 15, 2002Publication date: October 30, 2003Inventors: Richard Pommer, Charles B. Kuznia, Tri Q. Le, Richard T. Hagen, Ronald E. Reedy, James S. Cable, Donald J. Albares, Mark Miscione
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Publication number: 20030197256Abstract: Utilization of the “dead space” previously occupied by a metal stiffener in an integrated circuit package as a location for power conditioning and converting mechanisms such as decoupling capacitors and planar transformers.Type: ApplicationFiled: January 13, 2003Publication date: October 23, 2003Inventor: Richard Pommer
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Patent number: 6607939Abstract: Methods and apparatus for increasing the yield achieved during high density interconnect (HDI) production. In particular, processes in which panels are tested to identify good cells/parts, good cells are removed from the panels, and new panels created entirely of identified/known good cells allow increases in the number of layers used in a HDI without incurring the decrease in yield normally associated with such a layering process.Type: GrantFiled: December 18, 2001Date of Patent: August 19, 2003Assignee: Honeywell International Inc.Inventors: Richard Pommer, Simon McElrea, Brad Banister
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Patent number: 6489184Abstract: Methods and apparatus are provided which decrease the amount of movement likely to occur during processing of a substrate. In particular, a horizontally supported dielectric panel is subjected to a series of processing steps during which the panel is heated, cooled, or maintained at a fixed temperature so as to a achieve a 2 to 1 reduction in material movement during subsequent processing. It is contemplated that application of the disclosed methods to a dielectric panel will be particularly beneficial when application is accomplished prior to laser drilling and sputtering the panel.Type: GrantFiled: April 20, 2000Date of Patent: December 3, 2002Assignee: Honeywell International Inc.Inventors: Richard Pommer, Glen Roeters, Jim Yardley
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Publication number: 20020092159Abstract: Methods and apparatus for increasing the yield achieved during high density interconnect (HDI) production. In particular, processes in which panels are tested to identify good cells/parts, good cells are removed from the panels, and new panels created entirely of identified/known good cells allow increases in the number of layers used in a HDI without incurring the decrease in yield normally associated with such a layering process.Type: ApplicationFiled: December 18, 2001Publication date: July 18, 2002Inventors: Richard Pommer, Simon McElrea, Brad Banister
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Patent number: 6388325Abstract: Methods and apparatus for increasing the yield achieved during high density interconnect (HDI) production. In particular, processes in which panels are tested to identify good cells/parts, good cells are removed from the panels, and new panels created entirely of identified/known good cells allow increases in the number of layers used in a HDI without incurring the decrease in yield normally associated with such a layering process.Type: GrantFiled: November 2, 1999Date of Patent: May 14, 2002Assignee: AlliedSignal Inc.Inventors: Richard Pommer, Simon McElrea, Brad Banister
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Publication number: 20020003303Abstract: Methods and apparatus for increasing the yield achieved during high density interconnect (HDI) production. In particular, processes in which panels are tested to identify good cells/parts, good cells are removed from the panels, and new panels created entirely of identified/known good cells allow increases in the number of layers used in a HDI without incurring the decrease in yield normally associated with such a layering process.Type: ApplicationFiled: November 2, 1999Publication date: January 10, 2002Inventors: RICHARD POMMER, SIMON MCELREA, BRAD BANISTER
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Publication number: 20020004352Abstract: This invention concerns lasable bond-ply materials comprising a nonwoven reinforcing material and at least one resin material. The present invention also includes methods for using the bond-ply of this invention to manufacture high density multilayer printed wiring boards.Type: ApplicationFiled: April 4, 2001Publication date: January 10, 2002Applicant: AlliedSignal, Inc.Inventors: David Haas, Chengzeng Xu, Mavyn McAuliffe, Scott Zimmerman, Laura Miller, Meifang Qin, Baopei Xu, Richard Pommer
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Publication number: 20010039715Abstract: A substrate manufacturing plant comprising a plurality of minimum footprint skinned lines and methods relating to same. Specifically, a plant comprising a plurality of lines each line capable of accomplishing one step of a manufacturing process; the lines arranged in the order of their respective manufacturing steps so as to minimize the time necessary to process a work piece through all the lines; at least one line enclosed in its own environmental enclosure. By utilizing enclosures having the minimum size necessary to enclose and operate a single line or machine and arranging those enclosures in a linear fashion, parts progress linearly through the modules from start to finish without having to pass through a particular module more than once during processing. Because the size required to house a single machine is much smaller than a room designed to house multiple machines and people, control of the environment within the modules is relatively easy and cheap to accomplish.Type: ApplicationFiled: November 2, 1999Publication date: November 15, 2001Applicant: pommerInventors: RICHARD POMMER, RICHARD HAGAN