Abstract: Inner layer traces on a multilayer printed wiring board are exposed to enable direct interconnection with another device such as a printed wiring board. The traces may be exposed by removing at least some of the dielectric substrate material around the traces, or by extending the traces beyond the other layers of the printed wiring board. Corresponding conductors associated with the other device are placed in direct physical contact with the exposed inner layer traces, and may be aligned and secured with guide plates, alignment pins and spring members. Such direct connection mitigates the need for vias, and has more favorable electrical characteristics for high frequency signal transmission.

Abstract: A technique for facilitating signal transmission at high signal frequencies in a multi-layer substrate is disclosed. In one embodiment a multi-layer substrate comprises a conductor or pair of conductors, a first dielectric layer on a first side of the conductor or pair of conductors and a second dielectric layer on a second side of the conductor or pair of conductors. An air channel is provided in the first dielectric layer, the air channel formed to be substantially coextensive with the conductor or pair of conductors. A conductive shield surrounds the conductor or pair of conductors, the first dielectric layer, and the second dielectric layer in order to eliminate crosstalk. The conductor or pair of conductors may have discrete spaced edges and the width of the conductor or pair of conductors may be increased in order to adjust the impedance because of the low dielectric constant of air. Furthermore, additional air channels and a supporting layer may be included in the structure.

Abstract: A technique for facilitating signal transmission at high signal frequencies in a multi-layer substrate is disclosed. In one embodiment a multi-layer substrate comprises a conductor or pair of conductors, a first dielectric layer on a first side of the conductor or pair of conductors and a second dielectric layer on a second side of the conductor or pair of conductors. An air channel is provided in the first dielectric layer, the air channel formed to be substantially coextensive with the conductor or pair of conductors. A conductive shield surrounds the conductor or pair of conductors, the first dielectric layer, and the second dielectric layer in order to eliminate crosstalk. The conductor or pair of conductors may have discrete spaced edges and the width of the conductor or pair of conductors may be increased in order to adjust the impedance because of the low dielectric constant of air. Furthermore, additional air channels and a supporting layer may be included in the structure.

Abstract: A technique for electrically interconnecting a signal between a first circuit board and a second circuit board is disclosed. In each board, at least one signal conductor is shielded by an electrically conductive shield. Multiple conductors may be shielded by the same shield. A first opening is formed in the electrically conductive shield of the first circuit board and a second opening is formed in the electrically conductive shield of the second circuit board so as to expose the signal conductor in the each circuit board. An electrically conductive adhesive, reflowed solder paste, or interposer/elastomer device is applied surrounding at least one of the openings and may further be applied within at least one of the openings. The first circuit board and the second circuit board are then positioned such that the first opening and the second opening are aligned and a signal propagating along the first signal conductor is electrically interconnected to the second signal conductor.

Abstract: Exemplary techniques for providing a test point in a printed circuit board (PCB) or other circuit device that minimizes or eliminates intrusive effects in the transmitted as well as the monitored data signal are disclosed. A deposited resistor is used to provide a connection between a signal electrode and a transmission line of the PCB. Where the transmission line is embedded, the PCB may also include a tap to connect the signal layer of the PCB (having the embedded transmission line) with the signal electrode at the surface layer of the PCB. The deposited resistor is intended to act as a voltage-divider resistor and to buffer any perturbations of the system resulting from the tap and the introduction of a probe. Additionally, the deposited resistor may be positioned relative to the transmission line as to provide a equalization capacitance to compensate for parasitic capacitance.

Abstract: A technique for providing a multi-layer substrate which is capable of signal transmission at multiple propagation speeds is disclosed. In one embodiment, the technique is realized by constructing a multi-layer substrate by creating air channels in dielectric layers adjacent to a conductor. The air channels may also be filled with an alternative dielectric material. At least three types of multi-layer substrates may be produced through this technique. Furthermore, signal tracks of varying lengths can be provided to accommodate differing delays.

Abstract: A technique for electrically interconnecting a signal between a first circuit board and a second circuit board is disclosed. In each board, at least one signal conductor is shielded by an electrically conductive shield. Multiple conductors may be shielded by the same shield. A first opening is formed in the electrically conductive shield of the first circuit board and a second opening is formed in the electrically conductive shield of the second circuit board so as to expose the signal conductor in the each circuit board. An electrically conductive adhesive, reflowed solder paste, or interposer/elastomer device is applied surrounding at least one of the openings and may further be applied within at least one of the openings. The first circuit board and the second circuit board are then positioned such that the first opening and the second opening are aligned and a signal propagating along the first signal conductor is electrically interconnected to the second signal conductor.

Abstract: A technique for facilitating signal transmission at high signal frequencies in a multi-layer substrate is disclosed. In one embodiment a multi-layer substrate comprises a conductor or pair of conductors, a first dielectric layer on a first side of the conductor or pair of conductors and a second dielectric layer on a second side of the conductor or pair of conductors. An air channel is provided in the first dielectric layer, the air channel formed to be substantially coextensive with the conductor or pair of conductors. A conductive shield surrounds the conductor or pair of conductors, the first dielectric layer, and the second dielectric layer in order to eliminate crosstalk. The conductor or pair of conductors may have discrete spaced edges and the width of the conductor or pair of conductors may be increased in order to adjust the impedance because of the low dielectric constant of air. Furthermore, additional air channels and a supporting layer may be included in the structure.

Abstract: A technique for distributing common phase clock signals is disclosed. In one embodiment, the technique is realized by providing a forward traveling wave signal and a reverse traveling wave signal on a transmission line, wherein the forward traveling wave signal and the reverse traveling wave signal each have a common frequency and a constant relative phase. The forward traveling wave signal and the reverse traveling wave signal are each tapped off the transmission line at a plurality of different locations along the transmission line. The forward traveling wave signal and the reverse traveling wave signal that are tapped from the transmission line at each of the plurality of different locations are then combined so as to form a corresponding plurality of clock signals each having the common frequency and a common phase.

Abstract: A midplane board adapted for use in an electronic equipment shelf is provided. The midplane board includes a first surface having a plurality of contact elements adapted to engage corresponding contact elements on a first circuit board. The midplane board also includes a second surface in opposite relationship with the first surface. The second surface has a plurality of contact elements adapted to engage corresponding contact elements on a second circuit board in such a manner that at least a portion of a side of the first circuit board is opposed to at least a portion of a side of the second circuit board. The midplane includes at least one signal connection path including a buried via suitable for establishing a connection between a contact element on the first surface and a contact element on the second surface. The contact elements on the first surface define a first pattern while the contact elements on the second surface define a second pattern.

Abstract: A technique for connecting signal tracks within a multi-layer substrate is disclosed. In one embodiment, the technique is realized by providing an opening in a substrate and fitting an inserted component into the opening. The inserted component comprises a dielectric block mounted to a lead frame. The lead frame is conductive such that a signal layer formed between the inserted component and the substrate connects signal tracks on multiple signal layers of the substrate.

Abstract: A technique for coupling a signal between a first circuit board and a second circuit board. In one embodiment, the first circuit board has a first signal conductor formed therein, and the second circuit board has a second signal conductor formed therein. Also, the first signal conductor is shielded by a first electrically conductive shield, and the second signal conductor is shielded by a second electrically conductive shield. In this embodiment, the technique is realized by forming a first opening in the first electrically conductive shield so as to expose the first signal conductor in the first circuit board, and forming a second opening in the second electrically conductive shield so as to expose the second signal conductor in the second circuit board. The first circuit board and the second circuit board are then positioned such that the first opening and the second opening are aligned and a signal propagating along the first signal conductor is coupled to the second signal conductor.

Abstract: A new method is introduced to characterize EMC at the IC/ASIC package level. It is designed to excite the modes of radiations found in IC/ASIC packages, and permits the characterization of packages in a way that represents their real application. In the new method, a small antenna designed on a die is mounted inside the package under test. The package is mounted on a carrier PCB that is used to feed a signal into the antenna on the die. Radiated emissions from this set-up are measured. The antenna on the die is measured in free space to obtain a reference level which represents its capability to radiate without shielding. The antenna is then measured inside a package to obtain its capability to radiate with package shielding. The difference between the two measurements will represent the shielding effectiveness or the EMI reduction the package offers to the die. All measurements may conveniently be performed inside a TEM (Transverse Electromagnetic Mode) cell.

Abstract: In methods and apparatus for non-contact testing of an electronic circuit board at least one electromagnetic emission sensing probe is disposed a short distance from a circuit board under test, the circuit board is operated while sensing electromagnetic emission from a region of the circuit board near the probe, and a time domain representation of the sensed electromagnetic emission is developed. The time domain representation of the sensed electromagnetic emission is compared to a time domain representation of electromagnetic emission of a circuit board known to be operating properly. Preferably, an array of electric field sensing probes is used to sense emissions from several regions of the circuit board simultaneously, and time domain representations of the sensed electromagnetic emissions are simultaneously developed and compared to respective time domain representations of electromagnetic emissions from circuit boards known to be operating properly.

Abstract: Electromagnetic emission from a printed circuit board is monitored by energizing the board while it is located adjacent an array of electromagnetic emission measuring probes. The probes are successively addressed and currents induced in the probes are measured at a receiver. A memory map of the electromagnetic emission as a function of board position is generated and is displayed together with the circuit board layout so that regions of high emission level can be identified in the circuit. Each probe of the array is a series connected pair of wire loops, the planes of the loops being perpendicular to each other and to the plane of the array.

Abstract: Electromagnetic emission from a printed circuit board is monitored by energizing the board while it is located adjacent an array of electromagnetic emission measuring probes. The probes are successively addressed and currents induced in the probes are measured at a receiver. A memory map of the electromagnetic emission as a function of board position is generated and is displayed together with the circuit board layout so that regions of high emission level can be identified in the circuit. Each probe of the array is a series connected pair of wire loops, the planes of the loops being perpendicular to each other and to the plane of the array.