Patents by Inventor Richard R. Oehler

Richard R. Oehler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7921188
    Abstract: A computer system is described having a plurality of resources which includes a plurality of processors, a distributed point-to-point transmission infrastructure for interconnecting the plurality of processors, and a partitioning processor for configuring the plurality of resources into at least one partition. Each partition comprises a subset of the plurality of resources. The partitioning processor is operable to configure the resources by enabling at least one link between at least one of the plurality of processors and at least one other one of the plurality of processors according to a previously specified partitioning schema. The link(s) so enabled corresponds to a portion of the point-to-point transmission infrastructure.
    Type: Grant
    Filed: August 16, 2001
    Date of Patent: April 5, 2011
    Assignee: Newisys, Inc.
    Inventors: Richard R. Oehler, William G. Kulpa
  • Patent number: 7577755
    Abstract: Methods and apparatus are provided for improving the distribution of system management signals within a computer system complex. Mechanisms are provided for transmission both within a box and between computer system boxes. Local routing tables and general routing tables allow the distribution of system management signals precisely to resources associated with particular partitions. Signals are sequenced to put resources associated with one or more boxes in the appropriate states. The distribution of signals between boxes in the computer system complex can be accomplished without the use of a dedicated wire.
    Type: Grant
    Filed: November 19, 2002
    Date of Patent: August 18, 2009
    Assignee: Newisys, Inc.
    Inventors: Carl Zeitler, David Brian Glasco, Les Record, Richard R. Oehler, William G. Kulpa, Guru Prasadh, Rajesh Kota
  • Patent number: 7418517
    Abstract: Methods and apparatus are provided for improving the distribution of system management signals within a computer system complex. Mechanisms are provided for transmission both within a box and between computer system boxes. Local routing tables and general routing tables allow the distribution of system management signals precisely to resources associated with particular partitions. Signals are sequenced to put resources associated with one or more boxes in the appropriate states. The distribution of signals between boxes in the computer system complex can be accomplished with the use of a dedicated wire.
    Type: Grant
    Filed: January 30, 2003
    Date of Patent: August 26, 2008
    Assignee: Newisys, Inc.
    Inventors: Carl Zeitler, David Brian Glasco, Les Record, Richard R. Oehler, William G. Kulpa, Guru Prasadh, Rajesh Kota
  • Patent number: 7281055
    Abstract: A multi-processor computer system is described in which address mapping, routing, and transaction identification mechanisms are provided which enable the interconnection of a plurality of multi-processor clusters, wherein the number of processors interconnected exceeds limited address, node identification, and transaction tag spaces associated with each of the individual clusters.
    Type: Grant
    Filed: May 28, 2002
    Date of Patent: October 9, 2007
    Assignee: Newisys, Inc.
    Inventors: David Brian Glasco, Carl Zeitler, Rajesh Kota, Guru Prasadh, Richard R. Oehler
  • Patent number: 7251698
    Abstract: A multi-processor computer system is described in which address mapping, routing, and transaction identification mechanisms are provided which enable the interconnection of a plurality of multi-processor clusters, wherein the number of processors interconnected exceeds limited address, node identification, and transaction tag spaces associated with each of the individual clusters.
    Type: Grant
    Filed: May 28, 2002
    Date of Patent: July 31, 2007
    Assignee: Newisys, Inc.
    Inventors: David Brian Glasco, Carl Zeitler, Rajesh Kota, Guru Prasadh, Richard R. Oehler
  • Patent number: 7155525
    Abstract: A multi-processor computer system is described in which address mapping, routing, and transaction identification mechanisms are provided which enable the interconnection of a plurality of multi-processor clusters, wherein the number of processors interconnected exceeds limited address, node identification, and transaction tag spaces associated with each of the individual clusters.
    Type: Grant
    Filed: May 28, 2002
    Date of Patent: December 26, 2006
    Assignee: Newisys, Inc.
    Inventors: David Brian Glasco, Carl Zeitler, Rajesh Kota, Guru Prasadh, Richard R. Oehler
  • Patent number: 7047372
    Abstract: A computer system is described having a plurality of processing nodes interconnected by a first point-to-point architecture, and a system memory including a plurality of portions each of which is associated with one of the processing nodes. Each processing node includes a processor, and a memory controller for controlling access to the associated portion of the system memory, and may contain a host bridge for facilitating communication with a plurality of I/O devices. The first point-to-point architecture is operable to facilitate first transactions between the processors and the system memory. The computer system further includes at least one I/O controller and a second point-to-point architecture independent of the first point-to-point architecture and interconnecting the I/O controller and the host bridges. The at least one I/O controller is operable to facilitate second transactions between the I/O devices and the system memory via the second point-to-point architecture.
    Type: Grant
    Filed: April 15, 2003
    Date of Patent: May 16, 2006
    Assignee: Newisys, Inc.
    Inventors: Carl Zeitler, David B. Glasco, Rajesh Kota, Guru Prasadh, Richard R. Oehler, David S. Edrich
  • Patent number: 6986069
    Abstract: According to the present invention, methods and apparatus are provided for static and dynamic power management of computer systems. A power authority manages power usage levels in computer systems by monitoring power consumption levels and providing power consumption information to the various systems. In one example, the power authority updates power tables to vary aggregate power consumption levels.
    Type: Grant
    Filed: July 1, 2002
    Date of Patent: January 10, 2006
    Assignee: Newisys, Inc.
    Inventors: Richard R. Oehler, Carl Zeitler, Jr., Richard O. Simpson
  • Publication number: 20040210693
    Abstract: A computer system is described having a plurality of processing nodes interconnected by a first point-to-point architecture, and a system memory including a plurality of portions each of which is associated with one of the processing nodes. Each processing node includes a processor, and a memory controller for controlling access to the associated portion of the system memory, and may contain a host bridge for facilitating communication with a plurality of I/O devices. The first point-to-point architecture is operable to facilitate first transactions between the processors and the system memory. The computer system further includes at least one I/O controller and a second point-to-point architecture independent of the first point-to-point architecture and interconnecting the I/O controller and the host bridges. The at least one I/O controller is operable to facilitate second transactions between the I/O devices and the system memory via the second point-to-point architecture.
    Type: Application
    Filed: April 15, 2003
    Publication date: October 21, 2004
    Applicant: Newisys, Inc.
    Inventors: Carl Zeitler, David B. Glasco, Rajesh Kota, Guru Prasadh, Richard R. Oehler, David S. Edrich
  • Publication number: 20040153507
    Abstract: Methods and apparatus are provided for improving the distribution of system management signals within a computer system complex. Mechanisms are provided for transmission both within a box and between computer system boxes. Local routing tables and general routing tables allow the distribution of system management signals precisely to resources associated with particular partitions. Signals are sequenced to put resources associated with one or more boxes in the appropriate states. The distribution of signals between boxes in the computer system complex can be accomplished with the use of a dedicated wire.
    Type: Application
    Filed: January 30, 2003
    Publication date: August 5, 2004
    Applicant: Newisys, Inc. A Delaware corporation
    Inventors: Carl Zeitler, David Brian Glasco, Les Record, Richard R. Oehler, William G. Kulpa, Guru Prasadh, Rajesh Kota
  • Publication number: 20040098475
    Abstract: Methods and apparatus are provided for improving the distribution of system management signals within a computer system complex. Mechanisms are provided for transmission both within a box and between computer system boxes. Local routing tables and general routing tables allow the distribution of system management signals precisely to resources associated with particular partitions. Signals are sequenced to put resources associated with one or more boxes in the appropriate states. The distribution of signals between boxes in the computer system complex can be accomplished without the use of a dedicated wire.
    Type: Application
    Filed: November 19, 2002
    Publication date: May 20, 2004
    Applicant: Newisys, Inc., A Delaware Corporation
    Inventors: Carl Zeitler, David Brian Glasco, Les Record, Richard R. Oehler, William G. Kulpa, Guru Prasadh, Rajesh Kota
  • Publication number: 20040003303
    Abstract: According to the present invention, methods and apparatus are provided for static and dynamic power management of computer systems. A power authority manages power usage levels in computer systems by monitoring power consumption levels and providing power consumption information to the various systems. In one example, the power authority updates power tables to vary aggregate power consumption levels.
    Type: Application
    Filed: July 1, 2002
    Publication date: January 1, 2004
    Applicant: Newisys, Inc.
    Inventors: Richard R. Oehler, Carl Zeitler, Richard O. Simpson
  • Publication number: 20030233388
    Abstract: A multi-processor computer system is described in which address mapping, routing, and transaction identification mechanisms are provided which enable the interconnection of a plurality of multi-processor clusters, wherein the number of processors interconnected exceeds limited address, node identification, and transaction tag spaces associated with each of the individual clusters.
    Type: Application
    Filed: May 28, 2002
    Publication date: December 18, 2003
    Applicant: NEWISYS, Inc. A Delaware corporation
    Inventors: David Brian Glasco, Carl Zeitler, Rajesh Kota, Guru Prasadh, Richard R. Oehler
  • Publication number: 20030225938
    Abstract: A multi-processor computer system is described in which address mapping, routing, and transaction identification mechanisms are provided which enable the interconnection of a plurality of multi-processor clusters, wherein the number of processors interconnected exceeds limited address, node identification, and transaction tag spaces associated with each of the individual clusters.
    Type: Application
    Filed: May 28, 2002
    Publication date: December 4, 2003
    Applicant: Newisys, Inc., A Delaware corporation
    Inventors: David Brian Glasco, Carl Zeitler, Rajesh Kota, Guru Prasadh, Richard R. Oehler
  • Publication number: 20030225909
    Abstract: A multi-processor computer system is described in which address mapping, routing, and transaction identification mechanisms are provided which enable the interconnection of a plurality of multi-processor clusters, wherein the number of processors interconnected exceeds limited address, node identification, and transaction tag spaces associated with each of the individual clusters.
    Type: Application
    Filed: May 28, 2002
    Publication date: December 4, 2003
    Applicants: NEWISYS, Inc., A Delaware corporation
    Inventors: David Brian Glasco, Carl Zeitler, Rajesh Kota, Guru Prasadh, Richard R. Oehler
  • Publication number: 20030037224
    Abstract: A computer system is described having a plurality of resources which includes a plurality of processors, a distributed point-to-point transmission infrastructure for interconnecting the plurality of processors, and a partitioning processor for configuring the plurality of resources into at least one partition. Each partition comprises a subset of the plurality of resources. The partitioning processor is operable to configure the resources by enabling at least one link between at least one of the plurality of processors and at least one other one of the plurality of processors according to a previously specified partitioning schema. The link(s) so enabled corresponds to a portion of the point-to-point transmission infrastructure.
    Type: Application
    Filed: August 16, 2001
    Publication date: February 20, 2003
    Applicant: Newisys, Inc.
    Inventors: Richard R. Oehler, William G. Kulpa
  • Patent number: 5444854
    Abstract: A data processing system including a processor that issues communications commands on a first communications channel and a peripheral device that is connected to the first communications channel and to a second communications channel that operates asynchronously relative to the first communications channel. The peripheral device performs communications operations specified from the commands from the processor and further responds to communications over the second communications channel. The peripheral device includes a controller that provides a status word to the processor in response to the command issued to the peripheral device. The status word indicates the status condition of the peripheral device at the time when the peripheral device initiates the operation specified by the issued command.
    Type: Grant
    Filed: March 6, 1992
    Date of Patent: August 22, 1995
    Assignee: International Business Machines Corporation
    Inventors: Joseph R. Mathis, Richard R. Oehler, Carl Zeitler, Jr.
  • Patent number: 4937736
    Abstract: A method and apparatus for controlling access to data blocks stored by addresses in a memory and concurrently accessible by a plurality of transactions is provided. The method includes the steps of receiving an address of a data block to be accessed by a first transaction, deriving from the address an access table entry corresponding to the data block where the entry includes lock data that governs access to the data block, and providing the access if permitted by the lock data, or providing the access, if not permitted by the lock data, and recording the occurrence of the access in the lock data.
    Type: Grant
    Filed: November 30, 1987
    Date of Patent: June 26, 1990
    Assignee: International Business Machines Corporation
    Inventors: Albert Chang, John Cocke, Mark F. Mergen, Richard R. Oehler