Patents by Inventor Richard S. Kontra

Richard S. Kontra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8724365
    Abstract: A programmable device includes a substrate (10); an insulator (13) on the substrate; an elongated semiconductor material (12) on the insulator, the elongated semiconductor material having first and second ends, and an upper surface S; the first end (12a) is substantially wider than the second end (12b), and a metallic material is disposed on the upper surface; the metallic material being physically migratable along the upper surface responsive to an electrical current I flowable through the semiconductor material and the metallic material.
    Type: Grant
    Filed: March 22, 2012
    Date of Patent: May 13, 2014
    Assignee: International Business Machines Corporation
    Inventors: William R. Tonti, Wayne S. Berry, John A. Fifield, William H. Guthrie, Richard S. Kontra
  • Publication number: 20120178239
    Abstract: A programmable device includes a substrate (10); an insulator (13) on the substrate; an elongated semiconductor material (12) on the insulator, the elongated semiconductor material having first and second ends, and an upper surface S; the first end (12a) is substantially wider than the second end (12b), and a metallic material is disposed on the upper surface; the metallic material being physically migratable along the upper surface responsive to an electrical current I flowable through the semiconductor material and the metallic material.
    Type: Application
    Filed: March 22, 2012
    Publication date: July 12, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: William R. Tonti, Wayne S. Berry, John A. Fifield, William H. Guthrie, Richard S. Kontra
  • Patent number: 8184465
    Abstract: A programmable device includes a substrate (10); an insulator (13) on the substrate; an elongated semiconductor material (12) on the insulator, the elongated semiconductor material having first and second ends, and an upper surface S; the first end (12a) is substantially wider than the second end (12b), and a metallic material is disposed on the upper surface; the metallic material being physically migratable along the upper surface responsive to an electrical current I flowable through the semiconductor material and the metallic material.
    Type: Grant
    Filed: October 25, 2010
    Date of Patent: May 22, 2012
    Assignee: International Business Machines Corporation
    Inventors: William R. Tonti, Wayne S. Berry, John A. Fifield, William H. Guthrie, Richard S. Kontra
  • Patent number: 8018017
    Abstract: A thermo-mechanical cleavable structure is provided and may be used as a programmable fuse for integrated circuits. As applied to a programmable fuse, the thermo-mechanical cleavable structure includes an electrically conductive cleavable layer adjacent to a thermo-mechanical stressor. As electricity is passed through the cleavable layer, the cleavable layer and the thermo-mechanical stressor are heated and gas evolves from the thermo-mechanical stressor. The gas locally insulates the thermo-mechanical stressor, causing local melting adjacent to the bubbles in the thermo-mechanical stressor and the cleavable structure forming cleaving sites. The melting also interrupts the current flow through the cleavable structure so the cleavable structure cools and contracts. The thermo-mechanical stressor also contracts due to a phase change caused by the evolution of gas therefrom. As the thermo-mechanical cleavable structure cools, the cleaving sites expand causing gaps to be permanently formed therein.
    Type: Grant
    Filed: January 26, 2005
    Date of Patent: September 13, 2011
    Assignee: International Business Machines Corporation
    Inventors: Fen Chen, Cathryn J. Christiansen, Richard S. Kontra, Tom C. Lee, Alvin W. Strong, Timothy D. Sullivan, Joseph E. Therrien
  • Publication number: 20110032025
    Abstract: A programmable device includes a substrate (10); an insulator (13) on the substrate; an elongated semiconductor material (12) on the insulator, the elongated semiconductor material having first and second ends, and an upper surface S; the first end (12a) is substantially wider than the second end (12b), and a metallic material is disposed on the upper surface; the metallic material being physically migratable along the upper surface responsive to an electrical current I flowable through the semiconductor material and the metallic material.
    Type: Application
    Filed: October 25, 2010
    Publication date: February 10, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: William R. Tonti, Wayne S. Berry, John A. Fifield, William H. Guthrie, Richard S. Kontra
  • Patent number: 7872897
    Abstract: A programmable device includes a substrate (10); an insulator (13) on the substrate; an elongated semiconductor material (12) on the insulator, the elongated semiconductor material having first and second ends, and an upper surface S; the first end (12a) is substantially wider than the second end (12b), and a metallic material is disposed on the upper surface; the metallic material being physically migratable along the upper surface responsive to an electrical current I flowable through the semiconductor material and the metallic material.
    Type: Grant
    Filed: April 30, 2003
    Date of Patent: January 18, 2011
    Assignee: International Business Machines Corporation
    Inventors: William R. Tonti, Wayne S. Berry, John A. Fifield, William H. Guthrie, Richard S. Kontra
  • Patent number: 7777302
    Abstract: A method of modulating grain size in a polysilicon layer and devices fabricated with the method. The method includes forming the layer of polysilicon on a substrate; and performing an ion implantation of a polysilicon grain size modulating species into the polysilicon layer such that an average resultant grain size of the implanted polysilicon layer after performing a pre-determined anneal is higher or lower than an average resultant grain size than would be obtained after performing the same pre-determined anneal on the polysilicon layer without a polysilicon grain size modulating species ion implant.
    Type: Grant
    Filed: June 29, 2007
    Date of Patent: August 17, 2010
    Assignee: International Business Machines Corporation
    Inventors: Peter J. Geiss, Joseph R. Greco, Richard S. Kontra, Emily Lanning
  • Patent number: 7768815
    Abstract: A structure and a method for operating the same. The method comprises providing a resistive/reflective region on a substrate, wherein the resistive/reflective region comprises a material having a characteristic of changing the material's reflectance due to the material absorbing heat; sending an electric current through the resistive/reflective region so as to cause a reflectance change in the resistive/reflective region from a first reflectance value to a second reflectance value different from the first reflectance value; and optically reading the reflectance change in the resistive/reflective region.
    Type: Grant
    Filed: August 23, 2005
    Date of Patent: August 3, 2010
    Assignee: International Business Machines Corporation
    Inventors: Fen Chen, Richard S. Kontra, Tom C. Lee, Theodore M. Levin, Christopher D. Muzzy, Timothy D. Sullivan
  • Patent number: 7247924
    Abstract: A method of modulating grain size in a polysilicon layer and devices fabricated with the method. The method comprises forming the layer of polysilicon on a substrate; and performing an ion implantation of a polysilicon grain size modulating species into the polysilicon layer such that an average resultant grain size of the implanted polysilicon layer after performing a pre-determined anneal is higher or lower than an average resultant grain size than would be obtained after performing the same pre-determined anneal on the polysilicon layer without a polysilicon grain size modulating species ion implant.
    Type: Grant
    Filed: October 28, 2003
    Date of Patent: July 24, 2007
    Assignee: International Business Machines Corporation
    Inventors: Peter J. Geiss, Joseph R. Greco, Richard S. Kontra, Emily Lanning
  • Publication number: 20040084754
    Abstract: A method of modulating grain size in a polysilicon layer and devices fabricated with the method. The method comprises forming the layer of polysilicon on a substrate; and performing an ion implantation of a polysilicon grain size modulating species into the polysilicon layer such that an average resultant grain size of the implanted polysilicon layer after performing a pre-determined anneal is higher or lower than an average resultant grain size than would be obtained after performing the same pre-determined anneal on the polysilicon layer without a polysilicon grain size modulating species ion implant.
    Type: Application
    Filed: October 28, 2003
    Publication date: May 6, 2004
    Inventors: Peter J. Geiss, Joseph R. Greco, Richard S. Kontra, Emily Lanning
  • Patent number: 6682992
    Abstract: A method of modulating grain size in a polysilicon layer and devices fabricated with the method. The method comprises forming the layer of polysilicon on a substrate; and performing an ion implantation of a polysilicon grain size modulating species into the polysilicon layer such that an average resultant grain size of the implanted polysilicon layer after performing a pre-determined anneal is higher or lower than an average resultant grain size than would be obtained after performing the same pre-determined anneal on the polysilicon layer without a polysilicon grain size modulating species ion implant.
    Type: Grant
    Filed: May 15, 2002
    Date of Patent: January 27, 2004
    Assignee: International Business Machines Corporation
    Inventors: Peter J. Geiss, Joseph R. Greco, Richard S. Kontra, Emily Lanning
  • Publication number: 20030216013
    Abstract: A method of modulating grain size in a polysilicon layer and devices fabricated with the method. The method comprises forming the layer of polysilicon on a substrate; and performing an ion implantation of a polysilicon grain size modulating species into the polysilicon layer such that an average resultant grain size of the implanted polysilicon layer after performing a pre-determined anneal is higher or lower than an average resultant grain size than would be obtained after performing the same pre-determined anneal on the polysilicon layer without a polysilicon grain size modulating species ion implant.
    Type: Application
    Filed: May 15, 2002
    Publication date: November 20, 2003
    Applicant: International Business Machines Corporation
    Inventors: Peter J. Geiss, Joseph R. Greco, Richard S. Kontra, Emily Lanning
  • Patent number: 6649429
    Abstract: A method is presented for measuring and monitoring the mechanical stress at the device level which occurs intrinsically during the fabrication process or which is induced via extrinsic means. The method applies the fact that the current-voltage (I-V) characteristics of a diode change as the diode is subjected to mechanical stress. The method is applicable to monitoring stress at the microscopic and device levels at various stages in the semiconductor wafer fabrication process. Apparatus for implementing the method is also presented.
    Type: Grant
    Filed: July 11, 2002
    Date of Patent: November 18, 2003
    Assignee: International Business Machines Corporation
    Inventors: Edward D. Adams, Arne W. Ballantine, Richard S. Kontra, Alain Loiseau, James A. Slinkman
  • Publication number: 20020190252
    Abstract: A method is presented for measuring and monitoring the mechanical stress at the device level which occurs intrinsically during the fabrication process or which is induced via extrinsic means. The method applies the fact that the current-voltage (I-V) characteristics of a diode change as the diode is subjected to mechanical stress. The method is applicable to monitoring stress at the microscopic and device levels at various stages in the semiconductor wafer fabrication process. Apparatus for implementing the method is also presented.
    Type: Application
    Filed: July 11, 2002
    Publication date: December 19, 2002
    Inventors: Edward D. Adams, Arne W. Ballantine, Richard S. Kontra, Alain Loiseau, James A. Slinkman
  • Patent number: 6441396
    Abstract: A method is presented for measuring and monitoring the mechanical stress at the device level which occurs intrinsically during the fabrication process or which is induced via extrinsic means. The method applies the fact that the current-voltage (I-V) characteristics of a diode change as the diode is subjected to mechanical stress. The method is applicable to monitoring stress at the microscopic and device levels at various stages in the semiconductor wafer fabrication process. Apparatus for implementing the method is also presented.
    Type: Grant
    Filed: October 24, 2000
    Date of Patent: August 27, 2002
    Assignee: International Business Machines Corporation
    Inventors: Edward D. Adams, Arne W. Ballantine, Richard S. Kontra, Alain Loiseau, James A. Slinkman