Patents by Inventor Richard S. Kontra
Richard S. Kontra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8724365Abstract: A programmable device includes a substrate (10); an insulator (13) on the substrate; an elongated semiconductor material (12) on the insulator, the elongated semiconductor material having first and second ends, and an upper surface S; the first end (12a) is substantially wider than the second end (12b), and a metallic material is disposed on the upper surface; the metallic material being physically migratable along the upper surface responsive to an electrical current I flowable through the semiconductor material and the metallic material.Type: GrantFiled: March 22, 2012Date of Patent: May 13, 2014Assignee: International Business Machines CorporationInventors: William R. Tonti, Wayne S. Berry, John A. Fifield, William H. Guthrie, Richard S. Kontra
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Publication number: 20120178239Abstract: A programmable device includes a substrate (10); an insulator (13) on the substrate; an elongated semiconductor material (12) on the insulator, the elongated semiconductor material having first and second ends, and an upper surface S; the first end (12a) is substantially wider than the second end (12b), and a metallic material is disposed on the upper surface; the metallic material being physically migratable along the upper surface responsive to an electrical current I flowable through the semiconductor material and the metallic material.Type: ApplicationFiled: March 22, 2012Publication date: July 12, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: William R. Tonti, Wayne S. Berry, John A. Fifield, William H. Guthrie, Richard S. Kontra
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Patent number: 8184465Abstract: A programmable device includes a substrate (10); an insulator (13) on the substrate; an elongated semiconductor material (12) on the insulator, the elongated semiconductor material having first and second ends, and an upper surface S; the first end (12a) is substantially wider than the second end (12b), and a metallic material is disposed on the upper surface; the metallic material being physically migratable along the upper surface responsive to an electrical current I flowable through the semiconductor material and the metallic material.Type: GrantFiled: October 25, 2010Date of Patent: May 22, 2012Assignee: International Business Machines CorporationInventors: William R. Tonti, Wayne S. Berry, John A. Fifield, William H. Guthrie, Richard S. Kontra
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Patent number: 8018017Abstract: A thermo-mechanical cleavable structure is provided and may be used as a programmable fuse for integrated circuits. As applied to a programmable fuse, the thermo-mechanical cleavable structure includes an electrically conductive cleavable layer adjacent to a thermo-mechanical stressor. As electricity is passed through the cleavable layer, the cleavable layer and the thermo-mechanical stressor are heated and gas evolves from the thermo-mechanical stressor. The gas locally insulates the thermo-mechanical stressor, causing local melting adjacent to the bubbles in the thermo-mechanical stressor and the cleavable structure forming cleaving sites. The melting also interrupts the current flow through the cleavable structure so the cleavable structure cools and contracts. The thermo-mechanical stressor also contracts due to a phase change caused by the evolution of gas therefrom. As the thermo-mechanical cleavable structure cools, the cleaving sites expand causing gaps to be permanently formed therein.Type: GrantFiled: January 26, 2005Date of Patent: September 13, 2011Assignee: International Business Machines CorporationInventors: Fen Chen, Cathryn J. Christiansen, Richard S. Kontra, Tom C. Lee, Alvin W. Strong, Timothy D. Sullivan, Joseph E. Therrien
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Publication number: 20110032025Abstract: A programmable device includes a substrate (10); an insulator (13) on the substrate; an elongated semiconductor material (12) on the insulator, the elongated semiconductor material having first and second ends, and an upper surface S; the first end (12a) is substantially wider than the second end (12b), and a metallic material is disposed on the upper surface; the metallic material being physically migratable along the upper surface responsive to an electrical current I flowable through the semiconductor material and the metallic material.Type: ApplicationFiled: October 25, 2010Publication date: February 10, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: William R. Tonti, Wayne S. Berry, John A. Fifield, William H. Guthrie, Richard S. Kontra
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Patent number: 7872897Abstract: A programmable device includes a substrate (10); an insulator (13) on the substrate; an elongated semiconductor material (12) on the insulator, the elongated semiconductor material having first and second ends, and an upper surface S; the first end (12a) is substantially wider than the second end (12b), and a metallic material is disposed on the upper surface; the metallic material being physically migratable along the upper surface responsive to an electrical current I flowable through the semiconductor material and the metallic material.Type: GrantFiled: April 30, 2003Date of Patent: January 18, 2011Assignee: International Business Machines CorporationInventors: William R. Tonti, Wayne S. Berry, John A. Fifield, William H. Guthrie, Richard S. Kontra
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Patent number: 7777302Abstract: A method of modulating grain size in a polysilicon layer and devices fabricated with the method. The method includes forming the layer of polysilicon on a substrate; and performing an ion implantation of a polysilicon grain size modulating species into the polysilicon layer such that an average resultant grain size of the implanted polysilicon layer after performing a pre-determined anneal is higher or lower than an average resultant grain size than would be obtained after performing the same pre-determined anneal on the polysilicon layer without a polysilicon grain size modulating species ion implant.Type: GrantFiled: June 29, 2007Date of Patent: August 17, 2010Assignee: International Business Machines CorporationInventors: Peter J. Geiss, Joseph R. Greco, Richard S. Kontra, Emily Lanning
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Patent number: 7768815Abstract: A structure and a method for operating the same. The method comprises providing a resistive/reflective region on a substrate, wherein the resistive/reflective region comprises a material having a characteristic of changing the material's reflectance due to the material absorbing heat; sending an electric current through the resistive/reflective region so as to cause a reflectance change in the resistive/reflective region from a first reflectance value to a second reflectance value different from the first reflectance value; and optically reading the reflectance change in the resistive/reflective region.Type: GrantFiled: August 23, 2005Date of Patent: August 3, 2010Assignee: International Business Machines CorporationInventors: Fen Chen, Richard S. Kontra, Tom C. Lee, Theodore M. Levin, Christopher D. Muzzy, Timothy D. Sullivan
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Patent number: 7247924Abstract: A method of modulating grain size in a polysilicon layer and devices fabricated with the method. The method comprises forming the layer of polysilicon on a substrate; and performing an ion implantation of a polysilicon grain size modulating species into the polysilicon layer such that an average resultant grain size of the implanted polysilicon layer after performing a pre-determined anneal is higher or lower than an average resultant grain size than would be obtained after performing the same pre-determined anneal on the polysilicon layer without a polysilicon grain size modulating species ion implant.Type: GrantFiled: October 28, 2003Date of Patent: July 24, 2007Assignee: International Business Machines CorporationInventors: Peter J. Geiss, Joseph R. Greco, Richard S. Kontra, Emily Lanning
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Publication number: 20040084754Abstract: A method of modulating grain size in a polysilicon layer and devices fabricated with the method. The method comprises forming the layer of polysilicon on a substrate; and performing an ion implantation of a polysilicon grain size modulating species into the polysilicon layer such that an average resultant grain size of the implanted polysilicon layer after performing a pre-determined anneal is higher or lower than an average resultant grain size than would be obtained after performing the same pre-determined anneal on the polysilicon layer without a polysilicon grain size modulating species ion implant.Type: ApplicationFiled: October 28, 2003Publication date: May 6, 2004Inventors: Peter J. Geiss, Joseph R. Greco, Richard S. Kontra, Emily Lanning
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Patent number: 6682992Abstract: A method of modulating grain size in a polysilicon layer and devices fabricated with the method. The method comprises forming the layer of polysilicon on a substrate; and performing an ion implantation of a polysilicon grain size modulating species into the polysilicon layer such that an average resultant grain size of the implanted polysilicon layer after performing a pre-determined anneal is higher or lower than an average resultant grain size than would be obtained after performing the same pre-determined anneal on the polysilicon layer without a polysilicon grain size modulating species ion implant.Type: GrantFiled: May 15, 2002Date of Patent: January 27, 2004Assignee: International Business Machines CorporationInventors: Peter J. Geiss, Joseph R. Greco, Richard S. Kontra, Emily Lanning
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Publication number: 20030216013Abstract: A method of modulating grain size in a polysilicon layer and devices fabricated with the method. The method comprises forming the layer of polysilicon on a substrate; and performing an ion implantation of a polysilicon grain size modulating species into the polysilicon layer such that an average resultant grain size of the implanted polysilicon layer after performing a pre-determined anneal is higher or lower than an average resultant grain size than would be obtained after performing the same pre-determined anneal on the polysilicon layer without a polysilicon grain size modulating species ion implant.Type: ApplicationFiled: May 15, 2002Publication date: November 20, 2003Applicant: International Business Machines CorporationInventors: Peter J. Geiss, Joseph R. Greco, Richard S. Kontra, Emily Lanning
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Patent number: 6649429Abstract: A method is presented for measuring and monitoring the mechanical stress at the device level which occurs intrinsically during the fabrication process or which is induced via extrinsic means. The method applies the fact that the current-voltage (I-V) characteristics of a diode change as the diode is subjected to mechanical stress. The method is applicable to monitoring stress at the microscopic and device levels at various stages in the semiconductor wafer fabrication process. Apparatus for implementing the method is also presented.Type: GrantFiled: July 11, 2002Date of Patent: November 18, 2003Assignee: International Business Machines CorporationInventors: Edward D. Adams, Arne W. Ballantine, Richard S. Kontra, Alain Loiseau, James A. Slinkman
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Publication number: 20020190252Abstract: A method is presented for measuring and monitoring the mechanical stress at the device level which occurs intrinsically during the fabrication process or which is induced via extrinsic means. The method applies the fact that the current-voltage (I-V) characteristics of a diode change as the diode is subjected to mechanical stress. The method is applicable to monitoring stress at the microscopic and device levels at various stages in the semiconductor wafer fabrication process. Apparatus for implementing the method is also presented.Type: ApplicationFiled: July 11, 2002Publication date: December 19, 2002Inventors: Edward D. Adams, Arne W. Ballantine, Richard S. Kontra, Alain Loiseau, James A. Slinkman
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Patent number: 6441396Abstract: A method is presented for measuring and monitoring the mechanical stress at the device level which occurs intrinsically during the fabrication process or which is induced via extrinsic means. The method applies the fact that the current-voltage (I-V) characteristics of a diode change as the diode is subjected to mechanical stress. The method is applicable to monitoring stress at the microscopic and device levels at various stages in the semiconductor wafer fabrication process. Apparatus for implementing the method is also presented.Type: GrantFiled: October 24, 2000Date of Patent: August 27, 2002Assignee: International Business Machines CorporationInventors: Edward D. Adams, Arne W. Ballantine, Richard S. Kontra, Alain Loiseau, James A. Slinkman