Patents by Inventor Richard S. Sharp

Richard S. Sharp has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4371949
    Abstract: Automatically updatable error logging means incorporated in a multi-phase, bit addressable, variable field memory system. The memory system is partitioned into a plurality of individually addressable memory stacks and employs time-shared accessing of the memory stacks along with time-shared error detection and correction which is used with the error logging means to provide for automatic logging of detected errors during memory accesses on a priority basis.
    Type: Grant
    Filed: June 23, 1980
    Date of Patent: February 1, 1983
    Assignee: Burroughs Corporation
    Inventors: Ke-Chiang Chu, Richard S. Sharp
  • Patent number: 4234918
    Abstract: A multi-phase, bit addressable, variable field memory system partitioned into a plurality of individually addressable memory stacks and employing time-shared accessing circuitry as well as time shared error detection and data correction means, whereby serial memory stack accessing along with serial error checking and correction are achieved without significantly increasing the overall memory accessing time over that obtained for parallel accessing.
    Type: Grant
    Filed: May 31, 1977
    Date of Patent: November 18, 1980
    Assignee: Burroughs Corporation
    Inventors: Ke-Chiang Chu, Richard S. Sharp
  • Patent number: 4174537
    Abstract: Automatically updatable error logging means incorporated in a multi-phase, bit addressable, variable field memory system. The memory system is partitioned into a plurality of individually addressable memory stacks and employs time-shared accessing of the memory stacks along with time-shared error detection and correction which is used with the error logging means to provide for automatic logging of the detected errors during memory accesses on a priority basis.
    Type: Grant
    Filed: May 31, 1977
    Date of Patent: November 13, 1979
    Assignee: Burroughs Corporation
    Inventors: Ke-Chiang Chu, Richard S. Sharp
  • Patent number: 4138720
    Abstract: A bit addressable, variable field memory system partitioned into a plurality of individually addressable memory stacks and employing time-shared accessing circuitry in conjunction with the use of serial, multi-phase accessing of the memory stacks, whereby the advantages of serial memory stack accessing are achieved without significantly increasing the overall memory accessing time over that obtained for parallel accessing.
    Type: Grant
    Filed: April 4, 1977
    Date of Patent: February 6, 1979
    Assignee: Burroughs Corporation
    Inventors: Ke-Chiang Chu, Richard S. Sharp