Abstract: Disclosed are embodiments of a MOSFET with defined halos that are bound to defined source/drain extensions and a method of forming the MOSFET. A semiconductor layer is etched to form recesses that undercut a gate dielectric layer. A low energy implant forms halos. Then, a COR pre-clean is performed and the recesses are filled by epitaxial deposition. The epi can be in-situ doped or subsequently implanted to form source/drain extensions. Alternatively, the etch is immediately followed by the COR pre-clean, which is followed by epitaxial deposition to fill the recesses. During the epitaxial deposition process, the deposited material is doped to form in-situ doped halos and, then, the dopant is switched to form in-situ doped source/drain extensions adjacent to the halos. Alternatively, after the in-situ doped halos are formed the deposition process is performed without dopants and an implant is used to form source/drain extensions.

Abstract: A method for implementing a temperature cycling operation for a biochemical sample to be reacted includes applying an infrared (IR) heating source to the biochemical sample to be reacted at a first infrared wavelength selected so as to generate a first desired temperature for a first duration and produce a first desired reaction within the biochemical sample; following the first desired reaction, applying the infrared (IR) heating source to the biochemical sample at a second infrared wavelength selected so as to generate a second desired temperature for a second duration and produce a second desired reaction within the biochemical sample; and wherein the first and second wavelengths generated by the IR source are selected to be coincident with corresponding absorptive wavelengths of the biochemical sample so as to heat the biochemical sample without directly heating a fluid medium containing the biochemical sample.

Abstract: A method of forming a wiring structure for an integrated circuit includes the steps of forming a plurality of features in a layer of dielectric material, and forming spacers on sidewalls of the features. Conductors are then formed in the features, being separated from the sidewalls by the spacers. The spacers are then removed, forming air gaps at the sidewalls so that the conductors are separated from the sidewalls by the air gaps. Dielectric layers above and below the conductors may be low-k dielectrics having a dielectric constant less than that of the dielectric between the conductors. A cross-section of each of the conductors has a bottom in contact with the a low-k dielectric layer, a top in contact with another low-k dielectric, and sides in contact only with the air gaps. The air gaps serve to reduce the intralevel capacitance.

Abstract: Disclosed are embodiments of a MOSFET with defined halos that are bound to defined source/drain extensions and a method of forming the MOSFET. A semiconductor layer is etched to form recesses that undercut a gate dielectric layer. A low energy implant forms halos. Then, a COR pre-clean is performed and the recesses are filled by epitaxial deposition. The epi can be in-situ doped or subsequently implanted to form source/drain extensions. Alternatively, the etch is immediately followed by the COR pre-clean, which is followed by epitaxial deposition to fill the recesses. During the epitaxial deposition process, the deposited material is doped to form in-situ doped halos and, then, the dopant is switched to form in-situ doped source/drain extensions adjacent to the halos. Alternatively, after the in-situ doped halos are formed the deposition process is performed without dopants and an implant is used to form source/drain extensions.

Abstract: A non-destructive in-situ elemental profiling of a layer in a set of layers method and system are disclosed. In one embodiment, a first emission of a plurality of photoelectrons is caused from the layer to be elementally profiled. An elemental profile of the layer is determined based on the emission. In another embodiment, a second emission of a plurality of photoelectrons is also received from the layer, and an elemental profile is determined by comparison of the resulting signals. A process that is altering the layer can then be controlled “on-the-fly” to obtain a desired material composition. Since the method can be employed in-situ and is non-destructive, it reduces turn around time and lowers wafer consumption. The invention also records the composition of all processed wafers, hence, removing the conventional statistical sampling problem.

Abstract: The present invention relates to etch chemistry and methods for the etching of silicon substrates. The method is particularly useful for deep trench etching of silicon substrates and produces a trench having a high aspect ratio. In this type of deep trench etching, control of the profile of the trench is addressed by the etch chemistry disclosed herein. The etchant described in the present invention comprises silicon and a halogen component, and may be gaseous, liquid or solid. The etchant disclosed is also substantially free of hydrogen and carbon.

Abstract: Disclosed is a method of manufacturing a deep trench capacitor structure that forms a trench in a substrate, lines the trench with a polysilicon liner, and forms titanium nitride columns along the polysilicon liner. The method etches the titanium nitride columns using chlorine-based dry chemistry that is substantially isotropic. This etching process removes the upper portion of the titanium nitride columns without affecting the polysilicon liner. The etching process attacks only in the uppermost portion of the titanium nitride columns such that, after the etching process is completed, the remaining lower portions of the titanium nitride columns are substantially unaffected by the etching process. Then, the method fills the space between the titanium nitride columns and the upper portion of the trench with additional polysilicon material. The process of filling the space simultaneously forms a polysilicon plug and polysilicon cap.

Abstract: A method for removing carbon from or stripping a TERA layer. The method includes exposing the TERA layer to a plasma containing an effective amount of nitrogen, and, optionally, oxygen or fluorine. The method is compatible with fluorine based etching systems, and may thus be performed in the same etching system as other etching steps. For example, the method may be performed in the same system as a fluorine based plasma etch for oxide or nitride. The invention includes the method of stripping a TERA layer, etching an oxide layer, and etching a nitride layer in situ in the same etching system. The method is performed at low ion energies to avoid damaging oxide or nitride layers under the TERA film and to provide good selectivity.

Abstract: A method for reducing line edge roughness (LER) of a semiconductor gate structure includes patterning a photoresist layer formed over an oxide hardmask layer. The photoresist layer is etched so as to transfer a photoresist pattern to the oxide hardmask layer, the photoresist pattern having an initial LER. The exposed surfaces of the oxide hardmask are etched with a chemical oxide removal (COR) so as to form a reaction product on the exposed surfaces, wherein concave portions of the exposed surfaces are etched at a reduced rate with respect to convex portions of the exposed surfaces.

Abstract: A method for forming an interconnect structure in a semiconductor device includes defining a first insulator layer on a substrate and defining a via in the first insulator layer, thereby exposing a portion of the substrate. A sacrificial material is deposited over the first insulator layer and within the via, the sacrificial material being deposited at a thickness so as to also form a second insulator layer. A metallization line trench is defined in the second insulator layer, the trench being aligned over the via. Then, the sacrificial material is removed from the via opening, thereby allowing the via and the trench to be filled with a conductive material by dual damascene processing, wherein the formation of the trench and the removal of the sacrificial material from the via is implemented through a single etching operation.

Abstract: The present invention relates to etch chemistry and methods for the etching of silicon substrates. The method is particularly useful for deep trench etching of silicon substrates and produces a trench having a high aspect ratio. In this type of deep trench etching, control of the profile of the trench is addressed by the etch chemistry disclosed herein. The etchant described in the present invention comprises silicon and a halogen component, and may be gaseous, liquid or solid. The etchant disclosed is also substantially free of hydrogen and carbon.

Abstract: An apparatus for plasma processing of a wafer includes an annular structure including a magnet, where the structure is concentric with the wafer holder; the magnet generates a magnetic field for deflecting charged particles incident on the structure, thereby preventing damage to the structure by those particles. Accordingly, the structure may be of a material susceptible to erosion during the plasma processing, so that the magnetic field reduces that erosion. The cost of consumable parts in the apparatus is thus reduced. The annular structure may be characterized as a ring having a groove formed therein, with the magnet disposed in the groove. The magnet may be either a permanent magnet or an electromagnet.

Abstract: Methods and an apparatus for processing a substrate. A first method comprising: reacting a layer formed on the substrate with a plasma to form a reaction product layer; and simultaneously exposing the reaction product layer to resonant radiation to volatilize the reaction product layer. A second method comprising: performing a plasma enhanced chemical vapor deposition to deposit a precursor layer on a substrate; and simultaneously heating the precursor layer by exposure of the precursor layer to resonant radiation to convert the precursor layer to a deposited layer.

Abstract: A method for removing carbon from or stripping a TERA layer. The method includes exposing the TERA layer to a plasma containing an effective amount of nitrogen, and, optionally, oxygen or fluorine. The method is compatible with fluorine based etching systems, and may thus be performed in the same etching system as other etching steps. For example, the method may be performed in the same system as a fluorine based plasma etch for oxide or nitride. The invention includes the method of stripping a TERA layer, etching an oxide layer, and etching a nitride layer in situ in the same etching system. The method is performed at low ion energies to avoid damaging oxide or nitride layers under the TERA film and to provide good selectivity.

Abstract: A method of etching an organic antireflective film layer underlying a patterned resist layer on a semiconductor substrate by contacting the exposed organic film with a fluorocarbon and nitrogen etchant in the presence of a plasma-generated energy and removing exposed areas of the organic film with the etchant. An oxide layer underlying the organic film layer is substantially undamaged after contact with the etchant. The plasma is a high density plasma and preferably contains argon, C4F8, and nitrogen.

Abstract: An anisotropic etching process for a nitride layer of a substrate, the process comprising using an etchant gas which comprises a hydrogen-rich fluorohydrocarbon, an oxidant and a carbon source. The hydrogen-rich fluorohydrocarbon is preferably one of CH3F or CH2F2, the carbon source is preferably one of CO2 or CO, and the oxidant is preferably O2. The fluorohydrocarbon is preferably present in the gas at approximately 7%-35% by volume, the oxidant is preferably present in the gas at approximately 1%-35% by volume, and the carbon source is preferably present in the gas at approximately 30%-92%.

Abstract: Retrograde openings in thin films and the process for forming the same. The openings may include conductive materials formed within the openings to serve as a wiring pattern which includes wires having tapered cross sections. The process involves a two-step etching procedure for forming a retrograde opening within a film having a gradient of a characteristic that influences the etch rate for a chosen etchant species. An opening is first formed within the film by an anisotropic etch process. The opening is then converted to an opening including retrograde features by an isotropic etch process which is selective to the characteristic. Thereafter, the retrograde opening is filled with a conductive material, in one case, by electroplating or other deposition techniques.

Abstract: The propagation of microfissures from a photoresist to an underlying material layer during lithography and etching can be substantially prevented by placing a hard mask between the photoresist and the material layer to be etched. Specifically, the microfissure propagation is substantially prevented by (a) forming a compressive hard mask on a surface of a non-compressive material layer that is to be patterned by lithography and etching; (b) forming a patterned photoresist on said hard mask, wherein a portion of said hard mask is exposed; (c) removing said exposed portion of said hard mask so as to expose a portion of said non-compressive material layer; and (d) transferring said pattern from said patterned photoresist to said exposed portion of said material layer by etching, wherein said hard mask is selective to said etching and thus substantially prevents the propagation of photoresist microfissures to said material layer.

Abstract: An integrated circuit and method of making the integrated circuit. Air gaps are formed between surfaces of current-conducting lines that face one another and dielectric material disposed between these surfaces of the current-conducting lines. A liner material is applied to these surfaces of the current-conducting lines and, after the dielectric material is introduced between the current-conducting lines, the liner material is removed, for example by etching, leaving air gaps between the current-conducting lines and the dielectric material. These air gaps eliminate or greatly reduce the effect of capacitive currents across the dielectric material between the current-conducting lines.

Abstract: By providing a photoresist material with a protective polymer layer during the etching of an organic anti-reflective coating, undue damage to the photoresist material can be avoided during opening of the anti-reflective coating without the need for an oxidant. The preferred polymer chemistry system for producing such a result includes a fluorohydrocarbon-containing polymer mixture with a strong source of CF3, preferably C2F6. The etchant also includes a source of hydrogen selected from CH3F, C2HF5, or CH2F2, and a diluent selected from Ar, He or N2.