Abstract: A haptics rendering system comprises: a display device having a display screen and one or more haptic feedback mechanisms associated with at least one tactile output peripheral; and a graphics processing unit (GPU) communicatively coupled to the display device. The GPU: receives one or more portions of display image software code for a three dimensional display image; generates a three dimensional (3D) visual output of the display image for display on the display device; and concurrently generates one or more specific friction maps to provide haptic feedback of depth and/or texture associated with specific portions of the display image that comprise at least one portion having at least one of a different depth and a different texture than other portions of the display image. The GPU renders the display image and the friction map from a same set of 3D commands within the display image software code.

Abstract: A haptics rendering system comprises: a display device having a display screen and one or more haptic feedback mechanisms associated with at least one tactile output peripheral; and a graphics processing unit (GPU) communicatively coupled to the display device. The GPU: receives one or more portions of display image software code for a three dimensional display image; generates a three dimensional (3D) visual output of the display image for display on the display device; and concurrently generates one or more specific friction maps to provide haptic feedback of depth and/or texture associated with specific portions of the display image that comprise at least one portion having at least one of a different depth and a different texture than other portions of the display image. The GPU renders the display image and the friction map from a same set of 3D commands within the display image software code.

Abstract: A haptics rendering system comprises: a display device having a display screen and one or more haptic feedback mechanisms associated with at least one tactile output peripheral; and a graphics processing unit (GPU) communicatively coupled to the display device. The GPU: receives one or more portions of display image software code for a three dimensional display image; generates a three dimensional (3D) visual output of the display image for display on the display device; and concurrently generates one or more specific friction maps to provide haptic feedback of depth and/or texture associated with specific portions of the display image that comprise at least one portion having at least one of a different depth and a different texture than other portions of the display image. The GPU renders the display image and the friction map from a same set of 3D commands within the display image software code.

Abstract: A haptics rendering system comprises: a display device having a display screen and one or more haptic feedback mechanisms associated with at least one tactile output peripheral; and a graphics processing unit (GPU) communicatively coupled to the display device. The GPU: receives one or more portions of display image software code for a three dimensional display image; generates a three dimensional (3D) visual output of the display image for display on the display device; and concurrently generates one or more specific friction maps to provide haptic feedback of depth and/or texture associated with specific portions of the display image that comprise at least one portion having at least one of a different depth and a different texture than other portions of the display image. The GPU renders the display image and the friction map from a same set of 3D commands within the display image software code.

Abstract: A haptics rendering system comprises: a display device having a display screen and one or more haptic feedback mechanisms associated with at least one tactile output peripheral; and a graphics processing unit (GPU) communicatively coupled to the display device. The GPU: receives one or more portions of display image software code for a three dimensional display image; generates a three dimensional (3D) visual output of the display image for display on the display device; and concurrently generates one or more specific friction maps to provide haptic feedback of depth and/or texture associated with specific portions of the display image that comprise at least one portion having at least one of a different depth and a different texture than other portions of the display image. The GPU renders the display image and the friction map from a same set of 3D commands within the display image software code.

Abstract: Systems and methods for power state transitioning in an information handling system having a volatile memory and a nonvolatile memory are disclosed. Dirty data in the volatile memory may be identified. The dirty data may include data that has not been stored in the nonvolatile memory. Dirty data may be written from the volatile memory to the nonvolatile memory. Transitioning to a reduced power state may be in response to a trigger event. Transitioning from the reduced power state may be in response to a wake signal. Data may be copied from the nonvolatile memory to the volatile memory. An operating system may be waked to a restored state.

Abstract: A haptics rendering system comprises: a display device having a display screen and one or more haptic feedback mechanisms associated with at least one tactile output peripheral; and a graphics processing unit (GPU) communicatively coupled to the display device. The GPU: receives one or more portions of display image software code for a three dimensional display image; generates a three dimensional (3D) visual output of the display image for display on the display device; and concurrently generates one or more specific friction maps to provide haptic feedback of depth and/or texture associated with specific portions of the display image that comprise at least one portion having at least one of a different depth and a different texture than other portions of the display image. The GPU renders the display image and the friction map from a same set of 3D commands within the display image software code.

Abstract: A display device comprises: a display screen, a pixel layer, a backlight, and at least one ambient light sensor (ALS) which detects ambient light around the display device.

Abstract: Systems and methods for using a page table in an information handling system including a semiconductor storage device are disclosed. A page table in an information handling system may be provided. The information handling system may include a memory, and the memory may include a semiconductor storage device. NonDRAM tag data may be stored in the page table. The nonDRAM tag data may indicate one or more attributes of one or more pages in the semiconductor storage device.

Abstract: Systems and methods for power state transitioning in an information handling system having a volatile memory and a nonvolatile memory are disclosed. Dirty data in the volatile memory may be identified. The dirty data may include data that has not been stored in the nonvolatile memory. Dirty data may be written from the volatile memory to the nonvolatile memory. Transitioning to a reduced power state may be in response to a trigger event. Transitioning from the reduced power state may be in response to a wake signal. Data may be copied from the nonvolatile memory to the volatile memory. An operating system may be waked to a restored state.

Abstract: Systems and methods for using a page table in an information handling system including a semiconductor storage device are disclosed. A page table in an information handling system may be provided. The information handling system may include a memory, and the memory may include a semiconductor storage device. NonDRAM tag data may be stored in the page table. The nonDRAM tag data may indicate one or more attributes of one or more pages in the semiconductor storage device.

Abstract: A system and method is disclosed for initializing PCI devices in a computer system or information handling system. Upon initialization of the system, each operating system instance of the system attempts to access a PCI bridge device. The first operating system to access the bridge device is granted ownership of the bridge device and the authority to initialize each PCI device coupled to the bridge device. The bridge device assigns each operating system to at least one context included in at least one of the PCI devices. After each of the PCI devices has been initialized, a configuration event is issued with respect to each operating system instance and each assigned PCI device, thereby causing each operating system to recognize each PCI device assigned to each respective operating system instance.

Abstract: The present disclosure describes a system, method and software for informing an information handling system user as to the effect or consequences of changing operational characteristics of an information handling system component. In particular, the present disclosure provides a method for communicating the effects of user preference settings in an information handling system. The method provides for the display of a component control for a selected component operable to effect a user preference setting concerning the selected component. The method also provides for the display of an operating status for a component related to the selected component, the operating status resulting from effecting the user preference setting on the selected component. As a result, when a user changes one or more operational aspects of a component, the user is presented with the consequences of such changes on the operating status of related system components.

Abstract: A microprocessor card having a microprocessor is connected to a predetermined pattern of resistors for providing a binary notation signature identifying the speed capability of the microprocessor and for adjusting the speed of the clock signals for the microprocessor. A motherboard having circuitry for recognizing the binary notation signature identifying the speed capability of a microprocessor is connected to the predetermined pattern of resistors. A series of latches latch the microprocessor speed identification into a logic and lookup table circuitry. The table circuitry looks up a binary notation signature correlating the motherboard speed capability with the speed capability of the particular microprocessor. This binary notation signature, which identifies the motherboard speed in relationship to the microprocessor speed, provides the binary notation signature on the resistors and overrides the microprocessor speed identification.