Abstract: A system (1) has a server (2) linked with PC clients (5), in turn connected to test equipment (10). A design-of-experiment (DOE) engine (20) generates a series of run objects (21), each defining a variation of an equipment run. The inputs to the DOE engine (20) are a selected procedure object (25) and experiment variations. The engine (20) automatically determines all task objects (26), resource objects (27), and parameter configuration objects (28) linked with the selected procedure object (25). The variations may be variations in the hierarchical links and/or different values for the parameter configurations (28). There is a run object (21) associated with each variation permutation.

Abstract: A system (1) has a server (2) linked with PC clients (5), in turn connected to test equipment (10). A design-of-experiment (DOE) engine (20) generates a series of run objects (21), each defining a variation of an equipment run. The inputs to the DOE engine (20) are a selected procedure object (25) and experiment variations. The engine (20) automatically determines all task objects (26), resource objects (27), and parameter configuration objects (28) linked with the selected procedure object (25). The variations may be variations in the hierarchical links and/or different values for the parameter configurations (28). There is a run object (21) associated with each variation permutation.

Abstract: A wafer-level process for fabricating a plurality of passivated semiconductor devices comprising the steps of providing a semiconductor wafer on that at least one p-n junction is formed, Cutting a plurality of grooves in said wafer to expose said at least one p-n junction, wherein each of said grooves extends partly through the wafer and has a depth that is enough to expose said at least one p-n junction, applying a passivating material into said grooves and curing the material. The grooves can be formed by using a disc saw having a blade, by performing a sandblasting operation within a controlled operation time, or by performing a photolithographically chemical etching process. The passivating material is either screen-printed or pin-dispensed into the grooves. A dicing operation can be subsequently proceeded to divide the wafer into individual chips for subsequent fabrication into completed semiconductor devices.