Abstract: An architecture, method, and apparatus for managing a data buffer (Data Buffer Management DBM). A data buffer within the DBM is an unified linear memory space, and is divided into numbered physical pages with a predetermined page size. A memory map translates logical address spaces for storing/reading DBM transferred data to the physical address spaces. Each packet to be written into DBM is assigned a frame number or frame handler; thereafter, that frame number will be passed by the original owner (a device attached to the data buffer) to different processes for reading out and/or modifying the associated packet or packet data. Frame number assignment is done prior to actual data transfer by request of the data owner. The frame number request is done prior to moving data from the owner's local memory into the DBM's data buffer. Frame number is allocated dynamically by the DBM.

Abstract: A device and method for filtering addresses being transported through a high performance network, and rendering forwarding decisions for data frames corresponding to the address. Such data frames might correspond to multicast addresses wherein filtering is needed to prevent undesired data frames from being uploaded and processed by a receiving machine. The incoming address is hashed into an index for retrieving values from a table with a frame status. If the frame is valid, the same index is used to retrieve a table entry having address and address status information. If multiple data frames have been hashed into the same index, then further filtering is performed by the host machine or a processing device. Otherwise, the incoming address is compared with the address in the table entry. If a match occurs then the data frame is uploaded, and if no match then the frame is discarded. Frame status indicators in a bit register are used to direct actions performed on the frame.