Abstract: A cab having a wheeled carriage fixed thereto is moved between rails on an elevator car frame and similar rails on a wheeled bogey. The ends of the rails are scarfed in a complimentary fashion so as to provide a temporary half-lap joint between the rails of the bogey and the rails of the car frame. Motion is provided by linear motors having active primaries disposed on the car frame and the bogey and passive secondaries disposed on the cab carriage. Motor control is in response to position signals provided by magnetostrictive linear displacement transducers. The cab carriage includes rollers on vertical axes which contact the insides of the rails for guidance. The cab carriage wheels and rollers are disposed in pairs separated sufficiently so that at least one roller and one wheel of each pair is in contact with a full rail as the carriage crosses the rail joints between the car frame and the bogey.

Abstract: Common seat group transducer BITE circuitry located within the seat group SEB is responsive to the audio signal output of each transducer driver amplifier, the transducer BITE circuitry sensing the peak-to-peak voltage amplitude of the output signal to determine the operability of each driver, and sensing the current amplitude and frequency of the output signal to determine the transducer operability.

Abstract: An RTD probe interface having a three-wire interconnection with a source excitation line, a source return line, and a sensed signal line, includes: an excitation signal source connected between the source excitation line and the source return line for providing an excitation current signal through the RTD; an amplifier having first and second signal inputs connected respectively to the source excitation line and the sensed signal line, for providing an output voltage signal at a magnitude proportional to the difference magnitude between the voltage signals present at the first and second amplifier inputs, and a bias signal source connected between the sensed signal line and the source return line for presenting a bias current signal to the sensed line, at a magnitude and phase equal to that of the excitation current signal, for providing equal line impedance dependent values in the voltage signals appearing at the first and second inputs of the amplifier.

Abstract: A DITS receiver provides direct memory access (DMA) for a central processing unit (CPU) to the latest update value of a plurality of pre-identified signal data words stored in a DITS data RAM. The DITS stores the data received asynchronously on a plurality of input channels directly in RAM as it is received, by stripping the first byte of the data word information field which identifies the data source and using this first byte ID as an address pointer to define the location in RAM for each remaining signal bit of the data word. The DITS slices the data received on each input channel into samples of less than one bit cell duration through a common sampling network which under sequence control provides commutation of the input channel samples to ensure that dual speed input channel are each sampled at least one time within the signal speed time period. The sampled data is multiplexed into a serial data stream and steered either to a first byte address register or directly to the data RAM.