Abstract: An alignment assembly for masking and a process for depositing a metallic coating on selected areas on the back side of a semiconductor wafer. The assembly and process involves a distinctive alignment chuck having a pattern of grooves therein and a mask aligned with the chuck. In the method, a photomask for the back side of the wafer is aligned with the grooves in the chuck, a wafer nested face down in the chuck, and the mask moved into contact with the back side of the wafer. The front side of the wafer has a pattern of ridges that nest in the chuck grooves to align the wafer in the chuck. A photoresist layer on the back side of the wafer is subjected to an ultraviolet light through the photomask. Unexposed areas of photoresist are removed to expose selected areas on the back side of the wafer on which a metallic coating can be deposited.