Patents by Inventor Richard W. Hoffman

Richard W. Hoffman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150325733
    Abstract: A photovoltaic solar cell for producing energy from the sun including a germanium substrate including a first photoactive junction and forming a bottom solar subcell; a gallium arsenide middle cell disposed on said substrate; an indium gallium phosphide top cell disposed over the middle cell; and a surface grid including a plurality of spaced apart grid lines, wherein the grid lines have a thickness greater than 7 microns, and each grid line has a cross-section in the shape of a trapezoid with a cross-sectional area between 45 and 55 square microns.
    Type: Application
    Filed: July 21, 2015
    Publication date: November 12, 2015
    Inventors: Richard W. HOFFMAN, JR., Pravin PATEL, Tansen VARGHESE
  • Publication number: 20120285519
    Abstract: A photovoltaic solar cell for producing energy from the sun including a germanium substrate including a first photoactive junction and forming a bottom solar subcell; a gallium arsenide middle cell disposed on said substrate; an indium gallium phosphide top cell disposed over the middle cell; and a surface grid including a plurality of spaced apart grid lines, wherein the grid lines have a thickness greater than 7 microns, and each grid line has a cross-section in the shape of a trapezoid with a cross-sectional area between 45 and 55 square microns.
    Type: Application
    Filed: May 10, 2011
    Publication date: November 15, 2012
    Applicant: Emcore Solar Power, Inc.
    Inventors: Richard W. Hoffman, JR., Pravin Patel, Tansen Varghese
  • Patent number: 8309990
    Abstract: A III-V compound semiconductor structure comprises epitaxial structures that include an integrated pair of different types of active devices. The semiconductor structure includes a semi-insulating substrate of a compound semiconductor III-V material and a first compound semiconductor III-V epitaxial structure disposed on the substrate. A concentration profile of dopant material in the semiconductor structure decreases substantially smoothly across an interface between the substrate and the first epitaxial structure in a direction from the first epitaxial structure toward the substrate, and continues to decrease substantially smoothly from the interface with increasing depth into the substrate despite the presence of silicon or oxygen contaminant at the interface. The interface is substantially free of a second contaminant that was present, during formation of the first epitaxial structure, in a chamber in which the first epitaxial structure was formed.
    Type: Grant
    Filed: February 15, 2012
    Date of Patent: November 13, 2012
    Assignee: Emcore Corporation
    Inventors: Paul Cooke, Richard W. Hoffman, Jr., Victor Labyuk, Sherry Qianwen Ye
  • Patent number: 8288797
    Abstract: A method of fabricating an integrated circuit on a compound semiconductor III-V wafer including at least two different types of active devices by providing a substrate; growing a first epitaxial structure on the substrate; growing a second epitaxial structure on the first epitaxial structure; and processing the epitaxial structures to form different types of active devices, such as HBTs and FETs.
    Type: Grant
    Filed: December 9, 2010
    Date of Patent: October 16, 2012
    Assignee: Emcore Corporation
    Inventors: Paul Cooke, Richard W. Hoffman, Victor Labyuk, Sherry Qianwen Ye
  • Publication number: 20120146197
    Abstract: A method of fabricating an integrated circuit on a compound semiconductor III-V wafer including at least two different types of active devices by providing a substrate; growing a first epitaxial structure on the substrate; growing a second epitaxial structure on the first epitaxial structure; and processing the epitaxial structures to form different types of active devices, such as HBTs and FETs.
    Type: Application
    Filed: February 15, 2012
    Publication date: June 14, 2012
    Applicant: EMCORE CORPORATION
    Inventors: Paul Cooke, Richard W. Hoffman, JR., Victor Labyuk, Sherry Qianwen Ye
  • Publication number: 20110079821
    Abstract: A method of fabricating an integrated circuit on a compound semiconductor III-V wafer including at least two different types of active devices by providing a substrate; growing a first epitaxial structure on the substrate; growing a second epitaxial structure on the first epitaxial structure; and processing the epitaxial structures to form different types of active devices, such as HBTs and FETs.
    Type: Application
    Filed: December 9, 2010
    Publication date: April 7, 2011
    Applicant: Emcore Corporation
    Inventors: Paul Cooke, Richard W. Hoffman, Victor Labyuk, Sherry Qianwen Ye
  • Patent number: 7893463
    Abstract: An integrated pair of HBT and FET transistors shares a common compound semiconductor III-V epitaxial layer. The integrated pair of transistors includes a semi-insulating substrate of a compound semiconductor III-V material, a first epitaxial structure disposed on top of the substrate, a second epitaxial structure on top of the first epitaxial structure, and a third epitaxial structure disposed on top of the second epitaxial structure. The first epitaxial structure forms a portion of the HBT transistor. A concentration profile of a first contaminant, which contributes electrical charge, decreases substantially smoothly across an interface between the semi-insulating substrate and the first epitaxial structure. In some cases, the interface is free of a second contaminant that was present, during formation of the epitaxial structures, in a chamber in which the epitaxial structures were formed.
    Type: Grant
    Filed: May 12, 2010
    Date of Patent: February 22, 2011
    Assignee: Emcore Corporation
    Inventors: Paul Cooke, Richard W. Hoffman, Jr., Victor Labyuk, Sherry Qianwen Ye
  • Publication number: 20100313954
    Abstract: According to an embodiment, a solar cell receiver for converting solar energy to electricity includes a ceramic substrate, a solar cell and a heat sink. The ceramic substrate has a first metallized surface and an opposing second metallized surface. The first metallized surface of the ceramic substrate has separated conductive regions. The solar cell has a conductive first surface connected to a first one of the conductive regions of the ceramic substrate and an opposing second surface having a conductive contact area connected to a second one of the conductive regions. The heat sink is bonded to the second metallized surface of the ceramic substrate with a thermally conductive attach media, such as a metal-filled epoxy adhesive or solder.
    Type: Application
    Filed: June 16, 2009
    Publication date: December 16, 2010
    Applicant: Emcore Solar Power, Inc.
    Inventors: Steve Seel, Damien Buie, Philip Blumenfeld, James Foresi, John Nagyvary, Richard W. Hoffman, JR.
  • Publication number: 20100295096
    Abstract: A method of fabricating an integrated circuit on a compound semiconductor III-V wafer including at least two different types of active devices by providing a substrate; growing a first epitaxial structure on the substrate; growing a second epitaxial structure on the first epitaxial structure; and processing the epitaxial structures to form different types of active devices, such as HBTs and FETs.
    Type: Application
    Filed: May 12, 2010
    Publication date: November 25, 2010
    Applicant: Emcore Corporation
    Inventors: Paul Cooke, Richard W. Hoffman, JR., Victor Labyuk, Sherry Qianwen Ye
  • Patent number: 7700423
    Abstract: A method of fabricating an epitaxial compound semiconductor III-V wafer suitable for the subsequent fabrication of at least two different types of integrated active devices (such as an HBT and a FET) on such wafer by providing a substrate; growing a first epitaxial structure on the substrate; and growing a second epitaxial structure on the first epitaxial structure.
    Type: Grant
    Filed: July 28, 2006
    Date of Patent: April 20, 2010
    Assignee: IQE RF, LLC
    Inventors: Paul Cooke, Richard W. Hoffman, Jr., Victor Labyuk, Sherry Qianwen Ye
  • Publication number: 20080026545
    Abstract: A method of fabricating an integrated circuit on a compound semiconductor III-V wafer including at least two different types of active devices by providing a substrate; growing a first epitaxial structure on the substrate; growing a second epitaxial structure on the first epitaxial structure; and processing the epitaxial structures to form different types of active devices, such as HBTs and FETs.
    Type: Application
    Filed: July 28, 2006
    Publication date: January 31, 2008
    Inventors: Paul Cooke, Richard W. Hoffman, Victor Labyuk, Sherry Qianwen Ye
  • Publication number: 20080023725
    Abstract: A method of fabricating an epitaxial compound semiconductor III-V wafer suitable for the subsequent fabrication of at least two different types of integrated active devices (such as an HBT and a FET) on such wafer by providing a substrate; growing a first epitaxial structure on the substrate; and growing a second epitaxial structure on the first epitaxial structure.
    Type: Application
    Filed: July 28, 2006
    Publication date: January 31, 2008
    Inventors: Paul Cooke, Richard W. Hoffman, Victor Labyuk, Sherry Qianwen Ye
  • Patent number: 6482672
    Abstract: A method for growing InxGa1−xAs epitaxial layer on a lattice mismatched InP substrate calls for depositing by organo-metallic vapor phase epitaxy, or other epitaxial layer growth technique, a plurality of discreet layers of InAsyP1−y over an InP substrate. These layers provide a buffer. Each succeeding buffer layer has a distinct composition which produces less than a critical amount of lattice mismatch relative to the preceding layer. An InxGa1−xAs epitaxial layer is grown over the buffer wherein 0.53≦x≦0.76. A resulting InGaAs structure comprises an InP substrate with at least one InAsP buffer layer sandwiched between the substrate and the InGaAs epitaxial layer. The buffer layer has a critical lattice mismatch of less than 1.3% relative to the substrate. Additional buffer layers will likewise have a lattice mismatch of no more than 1.3% relative to the preceding layer.
    Type: Grant
    Filed: November 5, 1998
    Date of Patent: November 19, 2002
    Assignee: Essential Research, Inc.
    Inventors: Richard W. Hoffman, David M. Wilt
  • Patent number: 5571339
    Abstract: A hydrogen passivated photovoltaic device such as a solar cell comprises a lattice mismatched substrate such as Ge or Si, and a hydrogen passivated heteroepitaxial layer such as InP grown on the substrate. The hydrogen passivated heteroepitaxial III-V photovoltaic device is produced by exposing a sample of a heteroepitaxial III-V material grown on a lattice-mismatched substrate to reactive hydrogen species at elevated temperatures. Reactive hydrogen forms bonds with dangling bonds along dislocations defined in the sample. The electrical activity in the dislocations is passivated as a result of the hydrogenation process.
    Type: Grant
    Filed: April 17, 1995
    Date of Patent: November 5, 1996
    Assignees: The Ohio State Univ. Research Found, Essential Research Inc.
    Inventors: Steven A. Ringel, Richard W. Hoffman, Jr., Basab Chatterjee
  • Patent number: 5211301
    Abstract: A spooning closure generally comprising a skirt a top, a spooning opening and a hinged spooning lid which is adapted to pivot from a closed position to an open spooning position. A locking means is provided, which is adapted to securely and releasably lock the spooning lid in the closed position. The locking means comprises a tongue and a friction engaging slot. It may further comprise an arcuate latch projection which extends at an acute angle to the spooning lid bottom surface and a cooperating keeper which partially defines the spooning opening and is formed by an arcuate cantilever. Also provided is a reinforcing web extending from the bottom of the spooning lid.
    Type: Grant
    Filed: January 27, 1992
    Date of Patent: May 18, 1993
    Assignee: Magenta Corporation
    Inventors: Robert J. Groya, Richard W. Hoffman
  • Patent number: 5090583
    Abstract: A tamper-evident, tamper-resistant closure for an open neck container having a detachable closure cap that is adapted to open and close the dispenser end. A breakaway tether is integrally molded to the closure cap and a first closure ring which fits within the closure cap and around the container neck. A second tether is integrally formed with the closure cap and a second closure ring. The breakaway tether will rupture if this container is tampered with. Also the breakaway tether may be broken when the contents of the container is to be used. The second tether securely maintains the closure cap attached to the main closure.
    Type: Grant
    Filed: March 27, 1991
    Date of Patent: February 25, 1992
    Assignee: Magenta Corporation
    Inventors: Richard W. Hoffman, John Kinsley, Michael Illenberger