Abstract: Some embodiments include a system, comprising: a housing; an imaging array disposed within the housing; an imaging strip disposed within the housing; a first readout circuit coupled to the imaging array; a second readout circuit coupled to the imaging strip; and common electronics coupled to the first readout circuit and the second readout circuit and configured to generate image data in response to at least one of the first readout circuit and the second readout circuit.

Abstract: Some embodiments include a system, comprising: a plurality of pixels; a plurality of data lines coupled to the pixels; a plurality of switches coupling the pixels to the data lines; a plurality of readout circuits coupled to the data lines; control logic coupled to the readout circuits, the control logic configured to, for one of the pixels: acquire a first value for the pixel while the corresponding switch is in an off state; reset the corresponding readout circuit corresponding for the pixel; acquire a second value for the pixel after resetting the readout circuit; turn on the corresponding switch; acquire a third value for the pixel after turning on the corresponding switch; and combine the first value, the second value, and the third value into a combined value for the pixel.

Abstract: Some embodiments include an x-ray detector, comprising: a housing including a front plate; a substrate including a plurality of sensors configured to generate a two-dimensional image; and an x-ray conversion material; wherein the substrate and the x-ray conversion material are disposed within the housing and on the front plate.

Abstract: Some embodiments include a system, comprising: a plurality of pixels; a plurality of data lines coupled to the pixels; a plurality of switches coupling the pixels to the data lines; a plurality of readout circuits coupled to the data lines; control logic coupled to the readout circuits, the control logic configured to, for one of the pixels: acquire a first value for the pixel while the corresponding switch is in an off state; reset the corresponding readout circuit corresponding for the pixel; acquire a second value for the pixel after resetting the readout circuit; turn on the corresponding switch; acquire a third value for the pixel after turning on the corresponding switch; and combine the first value, the second value, and the third value into a combined value for the pixel.

Abstract: Some embodiments include a system, comprising: a housing; an imaging array disposed within the housing; an imaging strip disposed within the housing; a first readout circuit coupled to the imaging array; a second readout circuit coupled to the imaging strip; and common electronics coupled to the first readout circuit and the second readout circuit and configured to generate image data in response to at least one of the first readout circuit and the second readout circuit.

Abstract: Some embodiments include a system, comprising: first circuit including a transistor having an optically sensitive threshold voltage; a light source configured to illuminate the transistor; and a control circuit configured to activate the light source based on the threshold voltage. In some embodiments, a threshold voltage of the transistor may be stabilized.

Abstract: Some embodiments include a system, comprising: first circuit including a transistor having an optically sensitive threshold voltage; a light source configured to illuminate the transistor; and a control circuit configured to activate the light source based on the threshold voltage. In some embodiments, a threshold voltage of the transistor may be stabilized.

Abstract: An imager includes a flat panel configured to collect charges when the imager operates in a full-power charge integration mode. The imager switches to a low-power standby mode immediately after each image acquisition in the full-power charge integration mode. Bias current flowing through the flat panel is monitored in the standby mode. The imager switches to the full-power charge integration mode when detecting a change in the bias current indicating onset of an X-ray exposure.

Abstract: An imager includes a flat panel configured to collect charges when the imager operates in a full-power charge integration mode. The imager switches to a low-power standby mode immediately after each image acquisition in the full-power charge integration mode. Bias current flowing through the flat panel is monitored in the standby mode. The imager switches to the full-power charge integration mode when detecting a change in the bias current indicating onset of an X-ray exposure.

Abstract: An x-ray imaging device include a scintillator layer configured to generate light from x-rays, a TFT detector array at the first surface of the scintillator layer to detect light generated in the scintillator, and a CMOS sensor at the second surface of the scintillator layer to detect light generated in the scintillator.

Abstract: An imager includes a flat panel configured to collect charges when the imager operates in a full-power charge integration mode. The imager switches to a low-power standby mode immediately after each image acquisition in the full-power charge integration mode. Bias current flowing through the flat panel is monitored in the standby mode. The imager switches to the full-power charge integration mode when detecting a change in the bias current indicating onset of an X-ray exposure.

Abstract: An X-ray matrix imager is configured to operate based on a multiple-gate-line driving scheme and a shared-data-line driving scheme. The X-ray matrix imager includes a matrix with multiple pixels, multiple gate line sets, multiple data lines, multiple gate drivers, multiple row multiplexers, and multiple pull-down units. Each gate line sets includes a first gate line coupled to a first pixel and a second gate line coupled to a second pixel adjacent to the first pixel. Each data line is coupled to the multiple gate line sets for receiving charges accumulated on the pixels. Each row multiplexer is configured to selectively couple a corresponding gate driver to the first gate line or the second gate line in a corresponding gate line set. Each pull-down unit is configured to couple the first gate line to a constant voltage when the first gate line is not coupled to the corresponding gate driver.

Abstract: An X-ray matrix imager is configured to operate based on a multiple-gate-line driving scheme and a shared-data-line driving scheme. The X-ray matrix imager includes a matrix with multiple pixels, multiple gate line sets, multiple data lines, multiple gate drivers, multiple row multiplexers, and multiple pull-down units. Each gate line sets includes a first gate line coupled to a first pixel and a second gate line coupled to a second pixel adjacent to the first pixel. Each data line is coupled to the multiple gate line sets for receiving charges accumulated on the pixels. Each row multiplexer is configured to selectively couple a corresponding gate driver to the first gate line or the second gate line in a corresponding gate line set. Each pull-down unit is configured to couple the first gate line to a constant voltage when the first gate line is not coupled to the corresponding gate driver.

Abstract: An x-ray imaging device include a scintillator layer configured to generate light from x-rays, a TFT detector array at the first surface of the scintillator layer to detect light generated in the scintillator, and a CMOS sensor at the second surface of the scintillator layer to detect light generated in the scintillator.

Abstract: Improved corrosion resistance for direct X-ray imaging detectors is obtained by providing a pixelated, electrically conductive barrier layer between the X-ray sensitive material and the pixel electrodes. Each barrier layer can cover part or all of its corresponding pixel electrode. In cases where pixel electrodes makes contact to underlying circuitry through vertical vias, it is preferred for the barrier layers to cover the via sections of the pixel electrodes. The barrier layers for each pixel electrode can be spaced apart from each other, or they can all be included within a continuous film on top of the pixel electrodes. Such a continuous film can be pixelated by spatially modulating its properties (e.g., thickness, doping) to significantly reduce lateral conductivity from pixel to pixel.

Abstract: A method is provided for fabricating an image sensor array in a manner that reduces the potential for defects resulting from electrostatic discharge events during fabrication of the image sensor array. The method includes: forming at least one pixel over a substrate, the pixel including a switching transistor and a photo-sensitive cell; and forming a dielectric interlayer over the pixel. A key step in the method of the present invention is depositing a first conductive layer over the dielectric interlayer. After the first conductive layer is formed, the image sensor array is well protected from ESD events because the first conductive layer spreads out any charge induced by tribo-electric charging events that may occur during subsequent fabrication processing steps, thereby reducing the potential for localized damage to the switching transistors upon the occurrence of ESD events.

Abstract: A method is provided for fabricating an image sensor array in a manner that reduces the potential for defects resulting from electrostatic discharge events during fabrication of the image sensor array. The method includes: forming at least one pixel over a substrate, the pixel including a switching transistor and a photo-sensitive cell; and forming a dielectric interlayer over the pixel. A key step in the method of the present invention is depositing a first conductive layer over the dielectric interlayer. After the first conductive layer is formed, the image sensor array is well protected from ESD events because the first conductive layer spreads out any charge induced by tribo-electric charging events that may occur during subsequent fabrication processing steps, thereby reducing the potential for localized damage to the switching transistors upon the occurrence of ESD events.

Abstract: A method is provided for fabricating an image sensor array in a manner that reduces the potential for defects resulting from electrostatic discharge events during fabrication of the image sensor array. The method includes: forming at least one pixel over a substrate, the pixel including a switching transistor and a photo-sensitive cell; and forming a dielectric interlayer over the pixel. A key step in the method of the present invention is depositing a first conductive layer over the dielectric interlayer. After the first conductive layer is formed, the image sensor array is well protected from ESD events because the first conductive layer spreads out any charge induced by tribo-electric charging events that may occur during subsequent fabrication processing steps, thereby reducing the potential for localized damage to the switching transistors upon the occurrence of ESD events.

Abstract: An ESD protection system for an image sensor array includes a two-dimensional array of pixels formed on a substrate. Each of the pixels is connected to a gate line and a data line. The system includes a common ESD bus and at least one ESD protection circuit formed on the substrate. The protection circuit includes: a pair of thin film transistors connected in a back-to-back configuration with a first terminal connected to one of the gate lines, and a second terminal connected to the common ESD bus. Upon the occurrence of an electrostatic discharge onto the gate line causing the voltage across the terminals to exceed a threshold value, the protection circuit discharges the ESD charge from the gate line to the ESD bus, thereby preventing damage to each of the switching transistors in the pixels connected to the gate line.

Abstract: Improved corrosion resistance for direct X-ray imaging detectors is obtained by providing a pixelated, electrically conductive barrier layer between the X-ray sensitive material and the pixel electrodes. Each barrier layer can cover part or all of its corresponding pixel electrode. In cases where pixel electrodes makes contact to underlying circuitry through vertical vias, it is preferred for the barrier layers to cover the via sections of the pixel electrodes. The barrier layers for each pixel electrode can be spaced apart from each other, or they can all be included within a continuous film on top of the pixel electrodes. Such a continuous film can be pixelated by spatially modulating its properties (e.g., thickness, doping) to significantly reduce lateral conductivity from pixel to pixel.