Patents by Inventor Richard Wise

Richard Wise has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12606905
    Abstract: Methods and apparatuses for processing semiconductor substrates in an integration scheme to form chamferless vias are provided herein. Methods include bifurcating etching of dielectric by depositing a conformal removable sealant layer having properties for selective removal relative to dielectric material without damaging dielectric material. Some methods include forming an ashable conformal sealant layer. Methods also include forming hard masks including a Group IV metal and removing conformal removable sealant layers and hard masks in one operation using same etching chemistries.
    Type: Grant
    Filed: April 12, 2024
    Date of Patent: April 21, 2026
    Assignee: Lam Research Corporation
    Inventors: Sivananda Krishnan Kanakasabapathy, Hui-Jung Wu, Richard Wise, Arpan Pravin Mahorowala
  • Publication number: 20260106122
    Abstract: A metal-containing photoresist film may be deposited on a semiconductor substrate. Unintended metal-containing material may form on internal surfaces of a process chamber during deposition, bevel and backside cleaning, exposure, baking, development, etch, or other photolithography operations. A dry chamber clean may remove some of the unintended metal-containing material by exposure to plasma. A dry chamber clean may remove some of the unintended metal-containing material and modify some of the unintended metal-containing material by exposure to an etch gas at an elevated temperature without striking a plasma. The dry chamber clean may remove the modified metal-containing material using plasma having a chemistry configured to form volatile products of the modified metal-containing material. In some embodiments, the plasma includes a halide-containing plasma, hydrogen-containing plasma, hydrocarbon-containing plasma, inert gas-containing plasma, or mixtures thereof.
    Type: Application
    Filed: October 5, 2023
    Publication date: April 16, 2026
    Inventors: Boris VOLOSSKIY, Shambhu KC, Chen WANG, Andrew Pratheep LUSHINGTON, Michael Thomas MYERS, Timothy William WEIDMAN, Jeremy Todd TUCKER, Daniel PETER, Samantha S.H. TAN, Jerome S. HUBACEK, Alan J. JENSEN, Jothilingam RAMALINGAM, Richard WISE, Jason STEVENS, Seng ONG, Shahd Hassan LABIB, Yoko YAMAGUCHI
  • Publication number: 20260024735
    Abstract: A non-optical sensor system tracks and detects an endpoint of various photoresist processes. Photoresist processes may include deposition, development, bevel edge and/or backside clean, bake, etch, and chamber clean operations. Chamber clean may involve one or both of a thermal clean and a plasma clean of unintended metal-containing material. Endpoint detection of the thermal clean or remote plasma clean uses a throttle valve sensor that measures a position of a throttle valve over time. Alternatively, endpoint detection of the thermal clean or remote plasma clean uses a chamber manometer that tracks chamber pressure while the throttle valve is held constant. Endpoint detection of the plasma clean uses a non-optical sensor that can include an RF matching network, a temperature sensor, a heater control sensor, a Langmuir probe, or an RF harmonics sensor.
    Type: Application
    Filed: December 1, 2023
    Publication date: January 22, 2026
    Applicant: Lam Research Corporation
    Inventors: Shambhu KC, Boris VOLOSSKIY, Chen WANG, Andrew Pratheep LUSHINGTON, Michael Thomas MYERS, Jerome S. HUBACEK, Richard WISE, Jeremy Todd TUCKER, Jason STEVENS, Seng ONG, Malcolm ROUX
  • Patent number: 12437995
    Abstract: A method of processing a substrate includes: providing a substrate having one or more mandrels comprising a mandrel material, wherein a layer of a spacer material coats horizontal surfaces and sidewalls of the one or more mandrels; and etching and completely removing the layer of the spacer material from the horizontal surfaces of the one or more mandrels and thereby exposing the mandrel material, without completely removing the spacer material residing at the sidewalls of the one or more mandrels. The etching includes exposing the substrate to a plasma formed using a mixture comprising a first gas and a polymer-forming gas, and wherein the etching comprises forming a polymer on the substrate. Polymer-forming gas may include carbon (C) and hydrogen (H).
    Type: Grant
    Filed: February 10, 2022
    Date of Patent: October 7, 2025
    Assignee: Lam Research Corporation
    Inventors: Jengyi Yu, Samantha S. H. Tan, Yu Jiang, Hui-Jung Wu, Richard Wise, Yang Pan, Nader Shamma, Boris Volosskiy
  • Patent number: 12417916
    Abstract: Tin oxide film on a semiconductor substrate is etched selectively in a presence of photoresist by exposing the substrate to at least one of hydrogen-based chemistry and chlorine-based chemistry. In some implementations, a method of processing a semiconductor substrate starts by providing a semiconductor substrate having a patterned photoresist layer overlying a tin oxide layer. Next, openings are etched in the tin oxide layer using the patterned photoresist layer as a mask, and using at least one of a hydrogen-based etch chemistry and a chlorine-based etch chemistry. After the openings have been etched in the tin oxide layer, the photoresist layer is removed using an oxygen-based etch chemistry.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: September 16, 2025
    Assignee: Lam Research Corporation
    Inventors: Jengyi Yu, Samantha S. H. Tan, Yu Jiang, Hui-Jung Wu, Richard Wise, Yang Pan, Nader Shamma, Boris Volosskiy
  • Publication number: 20250246460
    Abstract: Methods for making thin-films on semiconductor substrates, which may be patterned using EUV, include: depositing the organometallic polymer-like material onto the surface of the semiconductor substrate, exposing the surface to EUV to form a pattern, and developing the pattern for later transfer to underlying layers. The depositing operations may be performed by chemical vapor deposition (CVD), atomic layer deposition (ALD), and ALD with a CVD component, such as a discontinuous, ALD-like process in which metal precursors and counter-reactants are separated in either time or space.
    Type: Application
    Filed: March 11, 2025
    Publication date: July 31, 2025
    Inventors: Jengyi YU, Samantha S.H. TAN, Mohammed Haroon ALVI, Richard WISE, Yang PAN, Richard Alan GOTTSCHO, Adrien LAVOIE, Sivananda Krishnan KANAKASABAPATHY, Timothy William WEIDMAN, Qinghuang LIN, Jerome S. HUBACEK
  • Patent number: 12315727
    Abstract: Methods and apparatuses for performing cycles of aspect ratio dependent deposition and aspect ratio independent etching on lithographically patterned substrates are described herein. Methods are suitable for reducing variation of feature depths and/or aspect ratios between features formed and partially formed by lithography, some partially formed features being partially formed due to stochastic effects. Methods and apparatuses are suitable for processing a substrate having a photoresist after extreme ultraviolet lithography. Some methods involve cycles of deposition by plasma enhanced chemical vapor deposition and directional etching by atomic layer etching.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: May 27, 2025
    Assignee: Lam Research Corporation
    Inventors: Nader Shamma, Richard Wise, Jengyi Yu, Samantha S.H. Tan
  • Patent number: 12278125
    Abstract: Methods for making thin-films on semiconductor substrates, which may be patterned using EUV, include: depositing the organometallic polymer-like material onto the surface of the semiconductor substrate, exposing the surface to EUV to form a pattern, and developing the pattern for later transfer to underlying layers. The depositing operations may be performed by chemical vapor deposition (CVD), atomic layer deposition (ALD), and ALD with a CVD component, such as a discontinuous, ALD-like process in which metal precursors and counter-reactants are separated in either time or space.
    Type: Grant
    Filed: October 5, 2023
    Date of Patent: April 15, 2025
    Assignee: Lam Research Corporation
    Inventors: Jengyi Yu, Samantha S. H. Tan, Mohammed Haroon Alvi, Richard Wise, Yang Pan, Richard Alan Gottscho, Adrien Lavoie, Sivananda Krishnan Kanakasabapathy, Timothy William Weidman, Qinghuang Lin, Jerome S. Hubacek
  • Publication number: 20250087498
    Abstract: Tin oxide films are used as mandrels in semiconductor device manufacturing. In one implementation the process starts by patterning a tin oxide layer using at least one of a hydrogen-based etch chemistry and a chlorine-based etch chemistry, and using patterned photoresist as a mask, thereby providing a substrate having a plurality of protruding tin oxide features (mandrels). Next, a conformal layer of spacer material is formed both on the horizontal surfaces and on the sidewalls of the mandrels. The spacer material is then removed from the horizontal surfaces exposing the tin oxide material of the mandrels, without fully removing the spacer material residing at the sidewalls of the mandrels. Next, mandrels are selectively removed (e.g., using hydrogen-based etch chemistry), while leaving the spacer material that resided at the sidewalls of the mandrels. The resulting spacers can be used for patterning underlying layers on the substrate.
    Type: Application
    Filed: November 22, 2024
    Publication date: March 13, 2025
    Inventors: Jengyi Yu, Samantha S.H. Tan, Seongjun Heo, Boris Volosskiy, Sivananda Krishnan Kanakasabapathy, Richard Wise, Yang Pan, Hui-Jung Wu
  • Patent number: 12183604
    Abstract: Methods for making thin-films on semiconductor substrates, which may be patterned using EUV, include: depositing the organometallic polymer-like material onto the surface of the semiconductor substrate, exposing the surface to EUV to form a pattern, and developing the pattern for later transfer to underlying layers. The depositing operations may be performed by chemical vapor deposition (CVD), atomic layer deposition (ALD), and ALD with a CVD component, such as a discontinuous, ALD-like process in which metal precursors and counter-reactants are separated in either time or space.
    Type: Grant
    Filed: March 15, 2023
    Date of Patent: December 31, 2024
    Assignee: Lam Research Corporation
    Inventors: Jengyi Yu, Samantha S. H. Tan, Mohammed Haroon Alvi, Richard Wise, Yang Pan, Richard Alan Gottscho, Adrien LaVoie, Sivananda Krishnan Kanakasabapathy, Timothy William Weidman, Qinghuang Lin, Jerome S. Hubacek
  • Patent number: 12183589
    Abstract: Tin oxide films are used as mandrels in semiconductor device manufacturing. In one implementation the process starts by patterning a tin oxide layer using at least one of a hydrogen-based etch chemistry and a chlorine-based etch chemistry, and using patterned photoresist as a mask, thereby providing a substrate having a plurality of protruding tin oxide features (mandrels). Next, a conformal layer of spacer material is formed both on the horizontal surfaces and on the sidewalls of the mandrels. The spacer material is then removed from the horizontal surfaces exposing the tin oxide material of the mandrels, without fully removing the spacer material residing at the sidewalls of the mandrels. Next, mandrels are selectively removed (e.g., using hydrogen-based etch chemistry), while leaving the spacer material that resided at the sidewalls of the mandrels. The resulting spacers can be used for patterning underlying layers on the substrate.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: December 31, 2024
    Assignee: Lam Research Corporation
    Inventors: Jengyi Yu, Samantha S. H. Tan, Seongjun Heo, Boris Volosskiy, Sivananda Krishnan Kanakasabapathy, Richard Wise, Yang Pan, Hui-Jung Wu
  • Publication number: 20240429045
    Abstract: Provided herein are methods and systems for reducing roughness of an EUV resist and improving etched features. The methods involve descumming an EUV resist, filling divots of the EUV resist, and protecting EUV resists with a cap. The resulting EUV resist has smoother features and increased selectivity to an underlying layer, which improves the quality of etched features. Following etching of the underlying layer, the cap may be removed.
    Type: Application
    Filed: June 27, 2024
    Publication date: December 26, 2024
    Inventors: Jengyi Yu, Samantha S.H. Tan, Liu Yang, Chen-Wei Liang, Boris Volosskiy, Richard Wise, Yang Pan, Da Li, Ge Yuan, Andrew Liang
  • Patent number: 12122554
    Abstract: A resealable beverage can lid has a lid having a top side having a score line forming a panel, a first rivet formed in the lid and extending outwardly from the top side of the lid, a second rivet formed in the panel and extending outwardly from the top side of the lid, and a tab portion comprising a main body portion having a rear lifting portion, a first forward rupturing portion, a second forward rupturing portion, an opening formed in the body portion for forming a tongue having a first aperture, a second aperture, the tab portion connected to the first rivet through the first aperture and the second rivet through the second aperture.
    Type: Grant
    Filed: October 19, 2022
    Date of Patent: October 22, 2024
    Assignee: SBH, INC.
    Inventors: Steven S. Schuver, Richard Wise
  • Patent number: 12094711
    Abstract: Tin oxide film on a semiconductor substrate is etched selectively with an etch selectivity of at least 10 in a presence of silicon (Si), carbon (C), or a carbon-containing material (e.g., photoresist) by exposing the substrate to a process gas comprising hydrogen (H2) and a hydrocarbon (e.g., at a hydrogen/hydrocarbon ratio of at least 5), such that a carbon-containing polymer is formed on the substrate. In some embodiments an apparatus for processing a semiconductor substrate includes a process chamber configured for housing the semiconductor substrate and a controller having program instructions on a non-transitory medium for causing selective etching of a tin oxide layer on a substrate in a presence of silicon, carbon, or a carbon-containing material by exposing the substrate to a plasma formed in a process gas that includes H2 and a hydrocarbon.
    Type: Grant
    Filed: February 10, 2022
    Date of Patent: September 17, 2024
    Assignee: Lam Research Corporation
    Inventors: Jengyi Yu, Samantha S. H. Tan, Yu Jiang, Hui-Jung Wu, Richard Wise, Yang Pan, Nader Shamma, Boris Volosskiy
  • Patent number: 12062538
    Abstract: Provided herein are methods and systems for reducing roughness of an EUV resist and improving etched features. The methods involve descumming an EUV resist, filling divots of the EUV resist, and protecting EUV resists with a cap. The resulting EUV resist has smoother features and increased selectivity to an underlying layer, which improves the quality of etched features. Following etching of the underlying layer, the cap may be removed.
    Type: Grant
    Filed: April 14, 2020
    Date of Patent: August 13, 2024
    Assignee: Lam Research Corporation
    Inventors: Jengyi Yu, Samantha S. H. Tan, Liu Yang, Chen-Wei Liang, Boris Volosskiy, Richard Wise, Yang Pan, Da Li, Ge Yuan, Andrew Liang
  • Publication number: 20240263301
    Abstract: Methods and apparatuses for processing semiconductor substrates in an integration scheme to form chamferless vias are provided herein. Methods include bifurcating etching of dielectric by depositing a conformal removable sealant layer having properties for selective removal relative to dielectric material without damaging dielectric material. Some methods include forming an ashable conformal sealant layer. Methods also include forming hard masks including a Group IV metal and removing conformal removable sealant layers and hard masks in one operation using same etching chemistries.
    Type: Application
    Filed: April 12, 2024
    Publication date: August 8, 2024
    Inventors: Sivananda Krishnan Kanakasabapathy, Hui-Jung Wu, Richard Wise, Arpan Pravin Mahorowala
  • Patent number: 12051589
    Abstract: Thin tin oxide films are used as spacers in semiconductor device manufacturing. In one implementation, formation of spacers involves deposition of a tin oxide layer on a semiconductor substrate having multiple protruding features. The deposition is performed in a deposition apparatus having a controller with program instructions configured to cause sequential contacting of the semiconductor substrate with a tin-containing precursor and an oxygen-containing precursor such as to coat the semiconductor substrate having the protruding features with a tin oxide layer. Next, tin oxide film is removed from horizontal surfaces, without being completely removed from the sidewalls of the protruding features. Next, the material of protruding features is etched away, leaving tin oxide spacers on the semiconductor substrate.
    Type: Grant
    Filed: September 21, 2021
    Date of Patent: July 30, 2024
    Assignee: Lam Research Corporation
    Inventors: David Charles Smith, Richard Wise, Arpan Pravin Mahorowala, Patrick A van Cleemput, Bart J. van Schravendijk
  • Patent number: 11987876
    Abstract: Methods and apparatuses for processing semiconductor substrates in an integration scheme to form chamferless vias are provided herein. Methods include bifurcating etching of dielectric by depositing a conformal removable sealant layer having properties for selective removal relative to dielectric material without damaging dielectric material. Some methods include forming an ashable conformal sealant layer. Methods also include forming hard masks including a Group IV metal and removing conformal removable sealant layers and hard masks in one operation using same etching chemistries.
    Type: Grant
    Filed: March 14, 2019
    Date of Patent: May 21, 2024
    Assignee: Lam Research Corporation
    Inventors: Sivananda Krishnan Kanakasabapathy, Hui-Jung Wu, Richard Wise, Arpan Mahorowala
  • Publication number: 20240145272
    Abstract: Methods for making thin-films on semiconductor substrates, which may be patterned using EUV, include: depositing the organometallic polymer-like material onto the surface of the semiconductor substrate, exposing the surface to EUV to form a pattern, and developing the pattern for later transfer to underlying layers. The depositing operations may be performed by chemical vapor deposition (CVD), atomic layer deposition (ALD), and ALD with a CVD component, such as a discontinuous, ALD-like process in which metal precursors and counter-reactants are separated in either time or space.
    Type: Application
    Filed: October 5, 2023
    Publication date: May 2, 2024
    Inventors: Jengyi YU, Samantha S.H. TAN, Mohammed Haroon ALVI, Richard WISE, Yang PAN, Richard Alan GOTTSCHO, Adrien LAVOIE, Sivananda Krishnan KANAKASABAPATHY, Timothy William WEIDMAN, Qinghuang LIN, Jerome S. HUBACEK
  • Publication number: 20240030031
    Abstract: Thin tin oxide films can be used in semiconductor device manufacturing. In one implementation, a method of processing a semiconductor substrate includes: providing a semiconductor substrate having a plurality of protruding features residing on an etch stop layer material, and an exposed tin oxide layer in contact with both the protruding features and the etch stop layer material, where the tin oxide layer covers both sidewalls and horizontal surfaces of the protruding features; and then completely removing the tin oxide layer from horizontal surfaces of the semiconductor substrate without completely removing the tin oxide layer residing at the sidewalls of the protruding features. Next, the protruding features can be removed without completely removing the tin oxide layer that resided at the sidewalls of the protruding features, thereby forming tin oxide spacers.
    Type: Application
    Filed: October 6, 2023
    Publication date: January 25, 2024
    Inventors: David Charles Smith, Richard Wise, Arpan Mahorowala, Patrick A. Van Cleemput, Bart J. Van Schravendijk