Patents by Inventor Rick A. Leininger

Rick A. Leininger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050285278
    Abstract: A marking for a semiconductor device component includes a plurality of adjacent, mutually adhered regions. The marking is configured to contrast visually with a semiconductor device component, and may include features that are configured to protrude from the semiconductor device component recessed features to provide desired indicia. Materials that contrast visually with one another may also be used to form the marking.
    Type: Application
    Filed: August 31, 2005
    Publication date: December 29, 2005
    Inventors: Ford Grigg, James Ocker, Rick Leininger
  • Patent number: 6939501
    Abstract: A stereolithographically fabricated marking for a semiconductor device component, such as a packaged or unpackaged semiconductor device or another substrate. When formed on a semiconductor device with a stereolithographically formed package structure, the marking may be integral with the package. The marking may be formed as apertures through or recesses in one or more stereolithographically fabricated layers of material, or the marking may include one or more stereolithographically fabricated layers that protrude from a surface of a semiconductor device component. Raised markings may also be formed on the surfaces of packaged or bare semiconductor device components. Alternatively, the marking may be fabricated separately from a semiconductor device component, then secured thereto. Methods for stereolithographically marking semiconductor device components are also disclosed.
    Type: Grant
    Filed: June 26, 2003
    Date of Patent: September 6, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Ford B. Grigg, James M. Ocker, Rick A. Leininger
  • Patent number: 6706374
    Abstract: A stereolithographically fabricated marking for a semiconductor device component, such as a packaged or unpackaged semiconductor device or another substrate. When formed on a semiconductor device with a stereolithographically formed package structure, the marking may be integral with the package. The marking may be formed as apertures through or recesses in one or more stereolithographically fabricated layers of material, or the marking may include one or more stereolithographically fabricated layers that protrude from a surface of a semiconductor device component. Raised markings may also be formed on the surfaces of packaged or bare semiconductor device components. Alternatively, the marking may be fabricated separately from a semiconductor device component, then secured thereto. Methods for stereolithographically marking semiconductor device components are also disclosed.
    Type: Grant
    Filed: November 21, 2002
    Date of Patent: March 16, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Ford B. Grigg, James M. Ocker, Rick A. Leininger
  • Patent number: 6703105
    Abstract: A stereolithographically fabricated marking for a semiconductor device component, such as a packaged or unpackaged semiconductor device or another substrate. When formed on a semiconductor device with a stereolithographically formed package structure, the marking may be integral with the package. The marking may be formed as apertures through or recesses in one or more stereolithographically fabricated layers of material, or the marking may include one or more stereolithographically fabricated layers that protrude from a surface of a semiconductor device component. Raised markings may also be formed on the surfaces of packaged or bare semiconductor device components. Alternatively, the marking may be fabricated separately from a semiconductor device component, then secured thereto. Methods for stereolithographically marking semiconductor device components are also disclosed.
    Type: Grant
    Filed: November 21, 2002
    Date of Patent: March 9, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Ford B. Grigg, James M. Ocker, Rick A. Leininger
  • Publication number: 20040000744
    Abstract: A stereolithographically fabricated marking for a semiconductor device component, such as a packaged or unpackaged semiconductor device or another substrate. When formed on a semiconductor device with a stereolithographically formed package structure, the marking may be integral with the package. The marking may be formed as apertures through or recesses in one or more stereolithographically fabricated layers of material, or the marking may include one or more stereolithographically fabricated layers that protrude from a surface of a semiconductor device component. Raised markings may also be formed on the surfaces of packaged or bare semiconductor device components. Alternatively, the marking may be fabricated separately from a semiconductor device component, then secured thereto. Methods for stereolithographically marking semiconductor device components are also disclosed.
    Type: Application
    Filed: June 26, 2003
    Publication date: January 1, 2004
    Inventors: Ford B. Grigg, James M. Ocker, Rick A. Leininger
  • Patent number: 6635333
    Abstract: A stereolithographically fabricated marking for a semiconductor device component, such as a packaged or unpackaged semiconductor device or another substrate. When the marking is formed on a semiconductor device with a stereolithographically formed package structure, the marking may be integral with the package structure. The marking may be formed as apertures through or recessed areas in one or more stereolithographically fabricated layers of material. Alternatively, the marking may include one or more stereolithographically fabricated layers that protrude from a surface of a semiconductor device component. The marking may be formed directly on a surface of a packaged or bare semiconductor device component. As an alternative, the marking can be fabricated separately from a semiconductor device component, then secured thereto. Methods of stereolithographically marking semiconductor device components are also disclosed.
    Type: Grant
    Filed: August 29, 2001
    Date of Patent: October 21, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Ford B. Grigg, James M. Ocker, Rick A. Leininger
  • Patent number: 6585927
    Abstract: A stereolithographically fabricated marking for a semiconductor device component, such as a packaged or unpackaged semiconductor device or another substrate. When formed on a semiconductor device with a stereolithographically formed package structure, the marking may be integral with the package. The marking may be formed as apertures through or recesses in one or more stereolithographically fabricated layers of material, or the marking may include one or more stereolithographically fabricated layers that protrude from a surface of a semiconductor device component. Raised markings may also be formed on the surfaces of packaged or bare semiconductor device components. Alternatively, the marking may be fabricated separately from a semiconductor device component, then secured thereto. Methods for stereolithographically marking semiconductor device components are also disclosed.
    Type: Grant
    Filed: December 14, 2000
    Date of Patent: July 1, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Ford B. Grigg, James M. Ocker, Rick A. Leininger
  • Publication number: 20030077418
    Abstract: A stereolithographically fabricated marking for a semiconductor device component, such as a packaged or unpackaged semiconductor device or another substrate. When formed on a semiconductor device with a stereolithographically formed package structure, the marking may be integral with the package. The marking may be formed as apertures through or recesses in one or more stereolithographically fabricated layers of material, or the marking may include one or more stereolithographically fabricated layers that protrude from a surface of a semiconductor device component. Raised markings may also be formed on the surfaces of packaged or bare semiconductor device components. Alternatively, the marking may be fabricated separately from a semiconductor device component, then secured thereto. Methods for stereolithographically marking semiconductor device components are also disclosed.
    Type: Application
    Filed: November 21, 2002
    Publication date: April 24, 2003
    Inventors: Ford B. Grigg, James M. Ocker, Rick A. Leininger
  • Publication number: 20030072926
    Abstract: A stereolithographically fabricated marking for a semiconductor device component, such as a packaged or unpackaged semiconductor device or another substrate. When formed on a semiconductor device with a stereolithographically formed package structure, the marking may be integral with the package. The marking may be formed as apertures through or recesses in one or more stereolithographically fabricated layers of material, or the marking may include one or more stereolithographically fabricated layers that protrude from a surface of a semiconductor device component. Raised markings may also be formed on the surfaces of packaged or bare semiconductor device components. Alternatively, the marking may be fabricated separately from a semiconductor device component, then secured thereto. Methods for stereolithographically marking semiconductor device components are also disclosed.
    Type: Application
    Filed: November 21, 2002
    Publication date: April 17, 2003
    Inventors: Ford B. Grigg, James M. Ocker, Rick A. Leininger
  • Patent number: 6489007
    Abstract: A stereolithographically fabricated marking for a semiconductor device component, such as a packaged or unpackaged semiconductor device or another substrate. When formed on a semiconductor device with a stereolithographicaily formed package structure, the marking may be integral with the package. The marking may be formed as apertures through or recesses in one or more stereolithographically fabricated layers of material, or the marking may include one or more stereolithographically fabricated layers that protrude from a surface of a semiconductor device component. Raised markings may also be formed on the surfaces of packaged or bare semiconductor device components. Alternatively, the marking may be fabricated separately from a semiconductor device component, then secured thereto. Methods for stereolithographically marking semiconductor device components are also disclosed.
    Type: Grant
    Filed: December 14, 2000
    Date of Patent: December 3, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Ford B. Grigg, James M. Ocker, Rick A. Leininger
  • Publication number: 20020018871
    Abstract: A stereolithographically fabricated marking for a semiconductor device component, such as a packaged or unpackaged semiconductor device or another substrate. When formed on a semiconductor device with a stereolithographically formed package structure, the marking may be integral with the package. The marking may be formed as apertures through or recesses in one or more stereolithographically fabricated layers of material, or the marking may include one or more stereolithographically fabricated layers that protrude from a surface of a semiconductor device component. Raised markings may also be formed on the surfaces of packaged or bare semiconductor device components. Alternatively, the marking may be fabricated separately from a semiconductor device component, then secured thereto. Methods for stereolithographically marking semiconductor device components are also disclosed.
    Type: Application
    Filed: December 14, 2000
    Publication date: February 14, 2002
    Inventors: Ford B. Grigg, James M. Ocker, Rick A. Leininger
  • Publication number: 20020006501
    Abstract: A stereolithographically fabricated marking for a semiconductor device component, such as a packaged or unpackaged semiconductor device or another substrate. When the marking is formed on a semiconductor device with a stereolithographically formed package structure, the marking may be integral with the package structure. The marking may be formed as apertures through or recessed areas in one or more stereolithographically fabricated layers of material. Alternatively, the marking may include one or more stereolithographically fabricated layers that protrude from a surface of a semiconductor device component. The marking may be formed directly on a surface of a packaged or bare semiconductor device component. As an alternative, the marking can be fabricated separately from a semiconductor device component, then secured thereto. Methods of stereolithographically marking semiconductor device components are also disclosed.
    Type: Application
    Filed: August 29, 2001
    Publication date: January 17, 2002
    Inventors: Ford B. Grigg, James M. Ocker, Rick A. Leininger
  • Patent number: 6337122
    Abstract: A stereolithographically fabricated marking for a semiconductor device component, such as a packaged or unpackaged semiconductor device or another substrate. When the marking is formed on a semiconductor device with a stereolithographically formed package structure, the marking may be integral with the package structure. The marking may be formed as apertures through or recessed areas in one or more stereolithographically fabricated layers of material. Alternatively, the marking may include one or more stereolithographically fabricated layers that protrude from a surface of a semiconductor device component. The marking may be formed directly on a surface of a packaged or bare semiconductor device component. As an alternative, the marking can be fabricated separately from a semiconductor device component, then secured thereto. Methods of stereolithographically marking semiconductor device components are also disclosed.
    Type: Grant
    Filed: January 11, 2000
    Date of Patent: January 8, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Ford B. Grigg, James M. Ocker, Rick A. Leininger
  • Publication number: 20010035597
    Abstract: A stereolithographically fabricated marking for a semiconductor device component, such as a packaged or unpackaged semiconductor device or another substrate. When formed on a semiconductor device with a stereolithographically formed package structure, the marking may be integral with the package. The marking may be formed as apertures through or recesses in one or more stereolithographically fabricated layers of material, or the marking may include one or more stereolithographically fabricated layers that protrude from a surface of a semiconductor device component. Raised markings may also be formed on the surfaces of packaged or bare semiconductor device components. Alternatively, the marking may be fabricated separately from a semiconductor device component, then secured thereto. Methods for stereolithographically marking semiconductor device components are also disclosed.
    Type: Application
    Filed: December 14, 2000
    Publication date: November 1, 2001
    Inventors: Ford B. Grigg, James M. Ocker, Rick A. Leininger