Abstract: A vertical cavity surface emitter array package for compiling optical data signals through an optical coupling connector is presented. The package includes the laser array that is mounted on a backing plate that has alignment holes in it, which receive alignment pins to align the array with the input end of the optical coupling connector. In one version of the package the input end of the optical coupling connector extends into the housing of the package and is aligned with the laser array. In a second version the optical coupling connector is extended to the housing and is aligned with optical fibers that project a feed-through assembly into alignment with a second optical coupling connector inside of the package, which in turn is aligned with the laser array. In a third embodiment an optical lens is aligned with the laser array and transmits optical data signals through a window insert in the housing of the package to the input end of the optical coupling connector.

Abstract: Optical transmission is accomplished with a set of transmitter arrays that are each constructed to transmit spatially separated optical data streams that are determined by the positions of each transmitter of said transmitter array and a set of receiver arrays, each of which is constructed to receive one or more of the spatially separated optical data streams. Optical coupling is provided over transmitter and receiver fiber-optic cables and other conventional optical elements, such as lens and prisms, to provide optical paths that maintain the spatial separation of said optical data streams as established by said transmitters.

Abstract: A deadlock avoidance system for avoiding interconnection deadlocks between a plurality of data transfer devices includes a controller, a switch interconnector coupled to all of said data transfer devices for interconnecting on a one-to-one basis selected ones of the data transfer device as requesting units to selected ones of said data transfer devices as receiving units. A transfer queue is employed that includes a master transfer register and a slave transfer register, a master register, a slave register and a target register.