Patents by Inventor Rick Reeve

Rick Reeve has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7512695
    Abstract: A method and system of communicating data between a source interconnect device and a destination interconnect device are defined. The method includes adding an identification component to the data at the source interconnect device prior to communicating the data, and extracting the identification component at the destination interconnect device. The identification component is then processed at the destination interconnect device, the identification component relating to the contents of the data. The invention extends to a machine-readable medium embodying a set of instructions for executing the method and to an interconnect device.
    Type: Grant
    Filed: May 7, 2003
    Date of Patent: March 31, 2009
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Mohamed Magdy Talaat, Rick Reeve, Richard L. Schober, Prasad Vajjhala, Yolin Lih, Dev Datta
  • Patent number: 7330927
    Abstract: A pointer manager is described. The pointer manager includes write circuitry to enter, into a queue that is implemented with a first memory, a pointer value that a read hub has exhausted the use of. The pointer manager also includes read circuitry to remove, from said queue, a pointer value that is to be sent to a write hub. The pointer manager also includes write circuitry to add, to a link list that is maintained with a second memory, a pointer value that is to be sent to the write hub. The pointer manager also includes read circuitry to obtain, from said link list, a pointer value that is to be sent to a read hub.
    Type: Grant
    Filed: May 7, 2003
    Date of Patent: February 12, 2008
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Rick Reeve, Richard L. Schober, Ian Colloff
  • Patent number: 7269697
    Abstract: A scheduler to manage the reading activity of a plurality of read hubs is described. Each read hub is capable of reading a piece of a packet from a different memory bank within a same cycle of operation so that pieces of different packets can be read from the memory banks within the same cycle of operation. The scheduler: 1) defines each read hub as an active read hub or inactive read hub, wherein an active read hub is engaged to read at least one packet from the memory banks and an inactive read hub is not so engaged; 2) defines each active read hub as a low speed mode read hub or a high speed mode read hub, wherein, a first packet read by a high speed mode read hub is read from the memory banks at a faster rate than a second packet read by a low speed mode read hub; and, 3) dynamically changes the number of active read hubs, the number of low speed mode read hubs and the number of high speed mode read hubs in light of traffic conditions.
    Type: Grant
    Filed: May 7, 2003
    Date of Patent: September 11, 2007
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Rick Reeve, Richard L. Schober, Ian Colloff
  • Patent number: 7124241
    Abstract: A write hub is described. The write hub has a plurality of registers. Each one of the registers helps generate a write address to a different memory bank from amongst a plurality of memory banks. Each of the registers are arranged in a ring so that each register can pass a pointer value toward a next register within the ring. The ring of registers further comprise a multiplexer between each of the registers. Each multiplexer has an output path that flows toward a next register within the ring relative to the multiplexer. Each multiplexer can introduce a pointer value to the ring at a next register within the ring.
    Type: Grant
    Filed: May 7, 2003
    Date of Patent: October 17, 2006
    Assignee: Avago Technologies General IP (Singapore) Pte.Ltd.
    Inventors: Rick Reeve, Richard L. Schober, Ian Colloff, Prasad Vajjhala
  • Publication number: 20050021797
    Abstract: A method and system of communicating data between a source interconnect device and a destination interconnect device are defined. The method includes adding an identification component to the data at the source interconnect device prior to communicating the data, and extracting the identification component at the destination interconnect device. The identification component is then processed at the destination interconnect device, the identification component relating to the contents of the data. The invention extends to a machine-readable medium embodying a set of instructions for executing the method and to an interconnect device.
    Type: Application
    Filed: May 7, 2003
    Publication date: January 27, 2005
    Inventors: Mohamed Talaat, Rick Reeve, Richard Schober, Prasad Vajjhala, Yolin Lih, Dev Datta
  • Publication number: 20040225734
    Abstract: A method and system of communicating data between a plurality of interconnect devices are described. The method includes allocating a sequence number associated with each grant authorizing a source interconnect device to communicate the data to a destination interconnect device. The sequence number of a queued grant is then with a reference sequence number and, in response to the comparison, the data is communicated. In one embodiment, the sequence number is a grant sequence number that defines a sequence in which each grant is to be executed in response to a comparison with a reference transmit sequence number.
    Type: Application
    Filed: May 7, 2003
    Publication date: November 11, 2004
    Inventors: Richard L. Schober, Rick Reeve, Prasad Vajjhala