Abstract: In at least some embodiments, an ultrasound system includes an ultrasound transducer and a bi-directional transistor coupled to the ultrasound transducer. The ultrasound system also includes an ultrasound receiver coupled to the bi-directional transistor. The bi-directional transistor operates to selectively connect the ultrasound transducer to ground and to selectively connect the ultrasound transducer to the ultrasound receiver.

Abstract: A controller area network transceiver and a transmission method for a controller area network provides improved symmetry between its differential output signal CANH and CANL such that capacitive imbalance is minimized. The transceiver disclosed herein includes a driver including a non-inverted output that couples to the first output terminal CANH and a inverted output that couples to the second output terminal CANL. A receiver comparator includes a non-inverted input coupled to the first output terminal CANH and a inverted input coupled to the second output terminal CANL. A first and second impedance matching circuit portions capacitively balance the first and second output terminals such that efficient common-mode rejection is enabled by setting the RC time constants formed by each impedance matching circuit and external resistances to be substantially equivalent.

Abstract: An EEPROM cell (10) formed on a substrate (18) using conventional process steps is provided. The cell (10) includes first (12) and second (14) conductive regions in the substrate (18) below the substrate's outer surface (28), and the first (12) and second (14) conductive regions are laterally displaced from one another by a predetermined distance (32). The cell (10) also includes an insulating layer (20) outwardly from the outer surface (28) of the substrate (18) positioned so that its edges are substantially in alignment between the first (12) and second (14) conductive regions. The cell (10) further includes a floating gate layer (22) outwardly from the insulating layer (20) and in substantially the same shape as the insulating layer (20). The cell (10) also includes a diffusion region (24 or 26) that extends laterally from at least one of the first (12) and second (14) conductive regions so as to overlap with the insulating layer (20).

Abstract: A controller area network transceiver and a transmission method for a controller area network provides improved symmetry between its differential output signal CANH and CANL such that capacitive imbalance is minimized. The transceiver disclosed herein includes a driver including a non-inverted output that couples to the first output terminal CANH and a inverted output that couples to the second output terminal CANL. A receiver comparator includes a non-inverted input coupled to the first output terminal CANH and a inverted input coupled to the second output terminal CANL. A first and second impedance matching circuit portions capacitively balance the first and second output terminals such that efficient common-mode rejection is enabled by setting the RC time constants formed by each impedance matching circuit and external resistances to be substantially equivalent.

Abstract: An EEPROM cell (10) formed on a substrate (18) using conventional process steps is provided. The cell (10) includes first (12) and second (14) conductive regions in the substrate (18) below the substrate's outer surface (28), and the first (12) and second (14) conductive regions are laterally displaced from one another by a predetermined distance (32). The cell (10) also includes an insulating layer (20) outwardly from the outer surface (28) of the substrate (18) positioned so that its edges are substantially in alignment between the first (12) and second (14) conductive regions. The cell (10) further includes a floating gate layer (22) outwardly from the insulating layer (20) and in substantially the same shape as the insulating layer (20). The cell (10) also includes a diffusion region (24 or 26) that extends laterally from at least one of the first (12) and second (14) conductive regions so as to overlap with the insulating layer (20).

Abstract: An EEPROM cell (10) formed on a substrate (18) using conventional process steps is provided. The cell (10) includes first (12) and second (14) conductive regions in the substrate (18) below the substrate's outer surface (28), and the first (12) and second (14) conductive regions are laterally displaced from one another by a predetermined distance (32). The cell (10) also includes an insulating layer (20) outwardly from the outer surface (28) of the substrate (18) positioned so that its edges are substantially in alignment between the first (12) and second (14) conductive regions. The cell (10) further includes a floating gate layer (22) outwardly from the insulating layer (20) and in substantially the same shape as the insulating layer (20). The cell (10) also includes a diffusion region (24 or 26) that extends laterally from at least one of the first (12) and second (14) conductive regions so as to overlap with the insulating layer (20).