Patents by Inventor Ricky D. Jordanger

Ricky D. Jordanger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9669427
    Abstract: In at least some embodiments, an ultrasound system includes an ultrasound transducer and a bi-directional transistor coupled to the ultrasound transducer. The ultrasound system also includes an ultrasound receiver coupled to the bi-directional transistor. The bi-directional transistor operates to selectively connect the ultrasound transducer to ground and to selectively connect the ultrasound transducer to the ultrasound receiver.
    Type: Grant
    Filed: January 24, 2012
    Date of Patent: June 6, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Max E. Nielsen, Ricky D. Jordanger, Ismail H. Oguzman
  • Patent number: 7113759
    Abstract: A controller area network transceiver and a transmission method for a controller area network provides improved symmetry between its differential output signal CANH and CANL such that capacitive imbalance is minimized. The transceiver disclosed herein includes a driver including a non-inverted output that couples to the first output terminal CANH and a inverted output that couples to the second output terminal CANL. A receiver comparator includes a non-inverted input coupled to the first output terminal CANH and a inverted input coupled to the second output terminal CANL. A first and second impedance matching circuit portions capacitively balance the first and second output terminals such that efficient common-mode rejection is enabled by setting the RC time constants formed by each impedance matching circuit and external resistances to be substantially equivalent.
    Type: Grant
    Filed: August 28, 2002
    Date of Patent: September 26, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Ricky D. Jordanger, Anton M. Antonsen
  • Publication number: 20040150034
    Abstract: An EEPROM cell (10) formed on a substrate (18) using conventional process steps is provided. The cell (10) includes first (12) and second (14) conductive regions in the substrate (18) below the substrate's outer surface (28), and the first (12) and second (14) conductive regions are laterally displaced from one another by a predetermined distance (32). The cell (10) also includes an insulating layer (20) outwardly from the outer surface (28) of the substrate (18) positioned so that its edges are substantially in alignment between the first (12) and second (14) conductive regions. The cell (10) further includes a floating gate layer (22) outwardly from the insulating layer (20) and in substantially the same shape as the insulating layer (20). The cell (10) also includes a diffusion region (24 or 26) that extends laterally from at least one of the first (12) and second (14) conductive regions so as to overlap with the insulating layer (20).
    Type: Application
    Filed: January 7, 2004
    Publication date: August 5, 2004
    Inventors: Andrew Marshall, Joseph A. Devore, Ross E. Teggatz, Wayne T. Chen, Ricky D. Jordanger
  • Publication number: 20040043739
    Abstract: A controller area network transceiver and a transmission method for a controller area network provides improved symmetry between its differential output signal CANH and CANL such that capacitive imbalance is minimized. The transceiver disclosed herein includes a driver including a non-inverted output that couples to the first output terminal CANH and a inverted output that couples to the second output terminal CANL. A receiver comparator includes a non-inverted input coupled to the first output terminal CANH and a inverted input coupled to the second output terminal CANL. A first and second impedance matching circuit portions capacitively balance the first and second output terminals such that efficient common-mode rejection is enabled by setting the RC time constants formed by each impedance matching circuit and external resistances to be substantially equivalent.
    Type: Application
    Filed: August 28, 2002
    Publication date: March 4, 2004
    Inventors: Ricky D. Jordanger, Anton M. Antonsen
  • Patent number: 6373094
    Abstract: An EEPROM cell (10) formed on a substrate (18) using conventional process steps is provided. The cell (10) includes first (12) and second (14) conductive regions in the substrate (18) below the substrate's outer surface (28), and the first (12) and second (14) conductive regions are laterally displaced from one another by a predetermined distance (32). The cell (10) also includes an insulating layer (20) outwardly from the outer surface (28) of the substrate (18) positioned so that its edges are substantially in alignment between the first (12) and second (14) conductive regions. The cell (10) further includes a floating gate layer (22) outwardly from the insulating layer (20) and in substantially the same shape as the insulating layer (20). The cell (10) also includes a diffusion region (24 or 26) that extends laterally from at least one of the first (12) and second (14) conductive regions so as to overlap with the insulating layer (20).
    Type: Grant
    Filed: July 18, 2001
    Date of Patent: April 16, 2002
    Assignee: Texas Instruments Incorporated
    Inventors: Andrew Marshall, Joseph A. Devore, Ross E. Teggatz, Wayne T. Chen, Ricky D. Jordanger
  • Publication number: 20010038120
    Abstract: An EEPROM cell (10) formed on a substrate (18) using conventional process steps is provided. The cell (10) includes first (12) and second (14) conductive regions in the substrate (18) below the substrate's outer surface (28), and the first (12) and second (14) conductive regions are laterally displaced from one another by a predetermined distance (32). The cell (10) also includes an insulating layer (20) outwardly from the outer surface (28) of the substrate (18) positioned so that its edges are substantially in alignment between the first (12) and second (14) conductive regions. The cell (10) further includes a floating gate layer (22) outwardly from the insulating layer (20) and in substantially the same shape as the insulating layer (20). The cell (10) also includes a diffusion region (24 or 26) that extends laterally from at least one of the first (12) and second (14) conductive regions so as to overlap with the insulating layer (20).
    Type: Application
    Filed: July 18, 2001
    Publication date: November 8, 2001
    Inventors: Andrew Marshall, Joseph A. Devore, Ross E. Teggatz, Wayne T. Chen, Ricky D. Jordanger