Patents by Inventor Ricky Lewelling

Ricky Lewelling has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and system for designing a timing closure of an integrated circuit
    Patent number: 7793254
    Abstract: Aspects for designing a timing closure of an integrated circuit include instantiating a minimum repeater between at least one block and a corresponding blockage if an interconnect crosses the corresponding blockage and according to a drive of the blockage. The aspects further include instantiating one or more smallest repeaters between at least one pair of connected blocks depending upon a drive of a corresponding interconnect, the instantiation of the smallest repeater being based on pre-determined criteria.
    Type: Grant
    Filed: July 18, 2007
    Date of Patent: September 7, 2010
    Assignee: Cadence Design Systems, Inc.
    Inventors: Patrick John Eichenseer, Ricky Lewelling, Ziad Sadi
  • Mothod and system for designing a timing closure of an integrated circuit
    Publication number: 20080016485
    Abstract: Aspects for designing a timing closure of an integrated circuit include instantiating a minimum repeater between at least one block and a corresponding blockage if an interconnect crosses the corresponding blockage and according to a drive of the blockage. The aspects further include instantiating one or more smallest repeaters between at least one pair of connected blocks depending upon a drive of a corresponding interconnect, the instantiation of the smallest repeater being based on pre-determined criteria.
    Type: Application
    Filed: July 18, 2007
    Publication date: January 17, 2008
    Inventors: Patrick Eichenseer, Ricky Lewelling, Ziad Sadi
  • Method and system for designing a timing closure of an integrated circuit
    Patent number: 7257798
    Abstract: Aspects for designing a timing closure of an integrated circuit include instantiating a minimum repeater between at least one block and a corresponding blockage if an interconnect crosses the corresponding blockage and according to a drive of the blockage. The aspects further include instantiating one or more smallest repeaters between at least one pair of connected blocks depending upon a drive of a corresponding interconnect, the instantiation of the smallest repeater being based on pre-determined criteria.
    Type: Grant
    Filed: June 21, 2005
    Date of Patent: August 14, 2007
    Assignee: Cadence Design Systems, Inc.
    Inventors: Patrick John Eichenseer, Ricky Lewelling, Ziad Sadi