Patents by Inventor Ricky Setiawan

Ricky Setiawan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170366333
    Abstract: In one aspect, a method includes: determining a power mode of a device; setting a first reference voltage level and a second reference voltage level based at least in part on the power mode; and using at least one of the first reference voltage level and the second reference voltage level for comparison against incoming data.
    Type: Application
    Filed: June 15, 2016
    Publication date: December 21, 2017
    Inventors: Hua Beng Chan, Rex Wong Tak Ying, Ricky Setiawan, Obaida Mohammed Khaled Abu Hilal
  • Publication number: 20170366330
    Abstract: In one aspect, an apparatus includes: a first time-to-data converter (TDC) to oversample a first duration of incoming data and hold the oversampled first duration during receipt of a second duration of the incoming data; a second TDC to oversample the second duration of the incoming data and hold the oversampled second duration during receipt of a third duration of the incoming data; a processing circuit coupled to the first and second TDCs, the processing circuit including a first filter to filter the oversampled first duration and the oversampled second duration and generate a control output therefrom; and a digitally controlled oscillator (DCO) coupled to the processing circuit to receive the control output and generate a recovery clock signal therefrom.
    Type: Application
    Filed: June 15, 2016
    Publication date: December 21, 2017
    Inventors: Hua Beng Chan, Rex Wong Tak Ying, Ricky Setiawan, Obaida Mohammed Khaled Abu Hilal
  • Publication number: 20170344508
    Abstract: A system, USB Type-C connector and method are provided herein to transmit encoded data across a USB cable from a transmitter circuit included within a transmitting port of a USB Type-C connector. The method described herein may generally include detecting a voltage generated at a configuration channel (CC) pin of a transmitting port of a USB Type-C connector, setting a voltage at an output node of the transmitter circuit equal to the voltage detected at the CC pin before the output node of the transmitter circuit is connected to the CC pin, subsequently connecting the output node of the transmitter circuit to the CC pin, and transmitting the encoded data from the transmitter circuit through the CC pin to the USB cable.
    Type: Application
    Filed: May 26, 2016
    Publication date: November 30, 2017
    Inventors: Ricky Setiawan, Rex Wong Tak Ying
  • Patent number: 9753474
    Abstract: A low-power low-dropout (LDO) voltage regulator device includes an error amplifier, a level-shifter circuit, and an NMOS pass transistor. The error amplifier compares a sampled portion of a regulated output voltage of the LDO voltage regulator with a reference voltage and generates an error signal. The level-shifter circuit is coupled to the error amplifier. The NMOS pass transistor provides the regulated output voltage with low dropout operation. The level-shifter circuit can shift a voltage level of the error signal to facilitate the low dropout operation of the NMOS pass transistor.
    Type: Grant
    Filed: February 5, 2014
    Date of Patent: September 5, 2017
    Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
    Inventors: Jinghua Zhang, Ricky Setiawan, Jeffrey Norwood Harrison
  • Publication number: 20160359495
    Abstract: Apparatus and associated methods are disclosed for gain programming or selection with parasitic element compensation. In one exemplary embodiment, an apparatus includes a first circuit that has a first programmable gain, and includes a first set of components having parasitic elements. The apparatus also includes a second circuit that has a second programmable gain, and includes a second set of components having parasitic elements. The apparatus has a gain that is a product of the first and second programmable gains. A gain error because of the parasitic elements of the first and second sets of components is canceled by setting the first programmable gain as a reciprocal of the second programmable gain.
    Type: Application
    Filed: June 6, 2015
    Publication date: December 8, 2016
    Inventors: Axel Thomsen, Alan L. Westwick, Ricky Setiawan, Rex Wong Tak Ying
  • Publication number: 20160359496
    Abstract: Apparatus and associated methods are disclosed for gain and offset trimming. In one exemplary embodiment, an apparatus includes a first circuit that includes a first transconductance stage to generate a first current. The first circuit has an output offset. The apparatus further includes an offset trim circuit, which includes a second circuit to provide an output voltage selectable from a plurality of voltage values, and a second transconductance stage to generate a second current in response to the output voltage of the second circuit. The output offset of the first circuit is trimmed by adding the second current to the first current.
    Type: Application
    Filed: June 6, 2015
    Publication date: December 8, 2016
    Inventors: Axel Thomsen, Alan L. Westwick, Ricky Setiawan, Rex Wong Tak Ying
  • Patent number: 9515671
    Abstract: Apparatus and associated methods are disclosed for gain programming or selection with parasitic element compensation. In one exemplary embodiment, an apparatus includes a first circuit that has a first programmable gain, and includes a first set of components having parasitic elements. The apparatus also includes a second circuit that has a second programmable gain, and includes a second set of components having parasitic elements. The apparatus has a gain that is a product of the first and second programmable gains. A gain error because of the parasitic elements of the first and second sets of components is canceled by setting the first programmable gain as a reciprocal of the second programmable gain.
    Type: Grant
    Filed: June 6, 2015
    Date of Patent: December 6, 2016
    Assignee: Silicon Laboratories Inc.
    Inventors: Axel Thomsen, Alan L. Westwick, Ricky Setiawan, Rex Wong Tak Ying
  • Patent number: 9503113
    Abstract: Apparatus and associated methods are disclosed for gain and offset trimming. In one exemplary embodiment, an apparatus includes a first circuit that includes a first transconductance stage to generate a first current. The first circuit has an output offset. The apparatus further includes an offset trim circuit, which includes a second circuit to provide an output voltage selectable from a plurality of voltage values, and a second transconductance stage to generate a second current in response to the output voltage of the second circuit. The output offset of the first circuit is trimmed by adding the second current to the first current.
    Type: Grant
    Filed: June 6, 2015
    Date of Patent: November 22, 2016
    Assignee: Silicon Laboratories Inc.
    Inventors: Axel Thomsen, Alan L. Westwick, Ricky Setiawan, Rex Wong Tak Ying
  • Publication number: 20150198960
    Abstract: A low-power low-dropout (LDO) voltage regulator device includes an error amplifier, a level-shifter circuit, and an NMOS pass transistor. The error amplifier compares a sampled portion of a regulated output voltage of the LDO voltage regulator with a reference voltage and generates an error signal. The level-shifter circuit is coupled to the error amplifier. The NMOS pass transistor provides the regulated output voltage with low dropout operation. The level-shifter circuit can shift a voltage level of the error signal to facilitate the low dropout operation of the NMOS pass transistor.
    Type: Application
    Filed: February 5, 2014
    Publication date: July 16, 2015
    Applicant: BROADCOM CORPORATION
    Inventors: Jinghua Zhang, Ricky Setiawan, Jeffrey Norwood Harrison
  • Patent number: 7649384
    Abstract: A high-voltage tolerant output driver for use in a switching regulator is provided herein. The driver allows the switching regulator to regulate supply voltages that exceed device breakdown limits for the process technology from which the high-voltage tolerant output driver is fabricated. Unregulated supply voltages can vary over a wide range. The regulator only needs two intermediate voltages.
    Type: Grant
    Filed: February 5, 2008
    Date of Patent: January 19, 2010
    Assignee: Broadcom Corporation
    Inventors: Seng Poh Ho, Tak Ying Wong, Yow Ching Cheng, Ricky Setiawan
  • Publication number: 20090195267
    Abstract: A high-voltage tolerant output driver for use in a switching regulator is provided herein. The driver allows the switching regulator to regulate supply voltages that exceed device breakdown limits for the process technology from which the high-voltage tolerant output driver is fabricated. Unregulated supply voltages can vary over a wide range. The regulator only needs two intermediate voltages.
    Type: Application
    Filed: February 5, 2008
    Publication date: August 6, 2009
    Applicant: Broadcom Corporation
    Inventors: Seng Poh Ho, Tak Ying Wong, Yow Ching Cheng, Ricky Setiawan