Patents by Inventor Rie Sasakawa

Rie Sasakawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230100998
    Abstract: A startup circuit for a bandgap reference source can include a first transistor coupled to a supply source and configured to provide a current to a reference resistance when the bandgap reference source is turned on, to thereby provide a reference voltage at a first node between the first transistor and the reference resistance, a second transistor coupled to the supply source to provide a second node therebetween, the second transistor having a gate coupled to the first node, such that the second transistor is off and a startup voltage at the second node is up when the reference voltage is at or below a threshold voltage, and the second transistor is on and the startup voltage at the second node is down when the reference voltage exceeds the threshold voltage, and a third transistor implemented between the supply source and a startup node of a bandgap core, the third transistor having a gate coupled to the second node such that the third transistor turns on to inject a startup current to the startup node whe
    Type: Application
    Filed: September 28, 2022
    Publication date: March 30, 2023
    Inventors: Rie SASAKAWA, Wai Laing LEE
  • Publication number: 20230102120
    Abstract: In some embodiments, a digital-to-analog converter (DAC) architecture can include an array having a total number of bit cells, and a control system configured to activate a selected number of the total number of bit cells and to deactivate the remaining bit cells. The selected number can be variable, such that the array consumes a quiescent current that depends on the selected number. The control system can be further configured to change the selected number when a signal condition exceeds a threshold duration.
    Type: Application
    Filed: September 28, 2022
    Publication date: March 30, 2023
    Inventors: Miles Reuben THOMPSON, Wai Laing LEE, Rie SASAKAWA, Xudong ZHAO
  • Publication number: 20230096254
    Abstract: In some embodiments, a calibration circuit can include a first circuit configured to generate a first output voltage based on a first reference voltage, and a second circuit configured to compare the first output voltage and a second reference voltage. The calibration circuit can further include a calibration block configured to provide an adjustment to the first circuit based on the comparison of the first output voltage and the second reference voltage, with the adjustment being configured to compensate for a change in the first reference voltage. In some embodiments, such a calibration circuit can be utilized for and/or be a part of a digital-to-analog converter for wireless audio applications.
    Type: Application
    Filed: September 28, 2022
    Publication date: March 30, 2023
    Inventors: Rie SASAKAWA, Donald Allen PEARCE, Wai Laing LEE, Miles Reuben THOMPSON
  • Patent number: 6359467
    Abstract: The present invention is a technique for dynamic element matching used in digital-to-analog converters (DAC's). An analog-to-digital converter (ADC) converts an analog signal into a digital code. A current-mode randomizer randomizes the digital code based on a control word provided by a pseudo random number generator. A digital-to-analog converter (DAC) converts the randomized digital code into an analog signal.
    Type: Grant
    Filed: October 5, 2000
    Date of Patent: March 19, 2002
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Benjamin J. McCarroll, Rie Sasakawa