Abstract: A nonvolatile semiconductor memory device comprises a memory cell configured to store data and a resistor element provided around the memory cell. The memory cell includes a charge storage layer provided above a substrate, a first semiconductor layer formed on a top surface of the charge storage layer via an insulating layer, and a first low resistive layer formed on a top surface of the first semiconductor layer and having resistance lower than that of the first semiconductor layer. The resistor element includes a second semiconductor layer formed on the same layer as the first semiconductor layer, and a second low resistive layer formed on the same layer as the first low resistive layer and on a top surface of the second semiconductor layer, having resistance lower than that of the second semiconductor layer. The second semiconductor layer is formed to extend in a first direction parallel to the substrate.

Abstract: A semiconductor memory device includes a plurality of memory cells, signal lines, and a control unit. Each of the plurality of memory cells includes a charge storage layer. Each of the plurality of memory cells includes a control gate and is configured to hold two-or-higher-level data. Each of signal lines is electrically connected with a gate or one end of a current path of each of the memory cells. Each of signal lines has a line width which differs depending on each interval between the memory cells adjacent to each other. The control unit controls a voltage applied to each of the signal lines in accordance with the line width of each of the signal lines.

Abstract: A semiconductor memory device includes a sense amplifier which senses identical multilevel data, which is stored in a memory cell, a plurality of number of times at a time of read, and a n-channel MOS transistor which has a current path one end of which is connected to the sense amplifier and the other end of which is connected to a bit line. The device further include a control unit which applies a first voltage to a gate electrode of the n-channel MOS transistor, thereby setting the n-channel MOS transistor in an ON state, and applies a second voltage which is higher than the first voltage, to the gate electrode during a period after first sense and before second sense.

Abstract: Disclosed herein are selected indolocarbazole derivatives which are represented by the general formula: The compounds are useful for enhancing the function and/or survival of a trophic factor responsive cell. They inhibit interleukin-2 production and have immunosuppressive activity.

Abstract: The present invention provides 2-piperidone compounds or pharmaceutically acceptable salts thereof, which have a potent activity of inhibiting the proliferation of tumor cells and thus are useful as medicaments, as well as antitumor agents containing these compounds. The 2-piperidone compound is represented by the following formula (I): wherein R1 represents —(CH2)nR1a {wherein n is an integer of from 0 to 5, and R1a represents amino, lower alkylamino, di(lower alkyl)amino, substituted or unsubstituted aryl, or a substituted or unsubstituted heterocyclic group}, and R2 and R3 independently represent lower alkyl which may be substituted by lower alkoxycarboyl; lower alkenyl, aralkyl or lower alkynyl which may be substituted by substituted or unsubstituted aryl or a substituted or unsubstituted heterocyclic group; substituted or unsubstituted aryl; or a substituted or unsubstituted heterocyclic group.