Patents by Inventor Riet Labie

Riet Labie has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10412830
    Abstract: According to an aspect of the present inventive concept there is provided a system comprising: a conductive textile including conductive fibers, an electronic circuit unit arranged on a first main surface of the conductive textile and including circuitry and a carrier supporting the circuitry, the carrier having a first main surface and a second main surface facing the first main surface of the textile and including a through-hole extending from the first main surface to the second main surface, a conductive pin including an leg segment arranged at least partly in the through-hole, and a grip segment arranged to grip about at least one fiber of the conductive textile. There is also provided a method for mounting an electronic circuit unit on a conductive textile.
    Type: Grant
    Filed: February 19, 2018
    Date of Patent: September 10, 2019
    Assignee: IMEC VZW
    Inventors: Riet Labie, Frederic Duflos
  • Publication number: 20180242449
    Abstract: According to an aspect of the present inventive concept there is provided a system comprising: a conductive textile including conductive fibers, an electronic circuit unit arranged on a first main surface of the conductive textile and including circuitry and a carrier supporting the circuitry, the carrier having a first main surface and a second main surface facing the first main surface of the textile and including a through-hole extending from the first main surface to the second main surface, a conductive pin including an leg segment arranged at least partly in the through-hole, and a grip segment arranged to grip about at least one fiber of the conductive textile. There is also provided a method for mounting an electronic circuit unit on a conductive textile.
    Type: Application
    Filed: February 19, 2018
    Publication date: August 23, 2018
    Inventors: Riet LABIE, Frederic DUFLOS
  • Patent number: 7880315
    Abstract: One inventive aspect is related to a method of bonding two elements and micro-electronic devices produced according to such methods. In one aspect, a micro-electronic device includes a first and a second element, bonded together by a joining structure. The joining structure has a first micropattern portion, a second micropattern portion, and a joining portion in between the first and second micropattern portions. The first and second micropattern portions are made of cobalt. The joining portion includes intermetallic compounds of cobalt and tin (Sn).
    Type: Grant
    Filed: May 11, 2009
    Date of Patent: February 1, 2011
    Assignee: IMEC
    Inventors: Eric Beyne, Riet Labie
  • Publication number: 20090218702
    Abstract: One inventive aspect is related to a method of bonding two elements and micro-electronic devices produced according to such methods. In one aspect, a micro-electronic device includes a first and a second element, bonded together by a joining structure. The joining structure has a first micropattern portion, a second micropattern portion, and a joining portion in between the first and second micropattern portions. The first and second micropattern portions are made of cobalt. The joining portion includes intermetallic compounds of cobalt and tin (Sn).
    Type: Application
    Filed: May 11, 2009
    Publication date: September 3, 2009
    Applicant: Interuniversitair Microelektronica Centrum vzw (IMEC)
    Inventors: Eric Beyne, Riet Labie
  • Patent number: 7547625
    Abstract: One inventive aspect is related to a method of bonding two elements. The method comprises producing on a first element a first micropattern, comprising a first metal layer. The method further comprises producing on a second element a second micropattern, comprising a second metal layer. The method further comprises applying onto the first micropattern and/or on the second micropattern a layer of solder material. The method further comprises producing on at least one of the elements a patterned non-conductive adhesive layer around the micropattern on the element. The method further comprises joining the first micropattern and the second micropattern by means of a thermocompression or reflow method, wherein the producing of an adhesive layer is performed before the joining such that the first and second elements are secured to each other by the adhesive layer(s) after joining.
    Type: Grant
    Filed: June 7, 2006
    Date of Patent: June 16, 2009
    Assignee: Interuniversitair Microelektronica Centrum vzw (IMEC)
    Inventors: Eric Beyne, Riet Labie
  • Publication number: 20060292824
    Abstract: One inventive aspect is related to a method of bonding two elements. The method comprises producing on a first element a first micropattern, comprising a first metal layer. The method further comprises producing on a second element a second micropattern, comprising a second metal layer. The method further comprises applying onto the first micropattern and/or on the second micropattern a layer of solder material. The method further comprises producing on at least one of the elements a patterned non-conductive adhesive layer around the micropattern on the element. The method further comprises joining the first micropattern and the second micropattern by means of a thermocompression or reflow method, wherein the producing of an adhesive layer is performed before the joining such that the first and second elements are secured to each other by the adhesive layer(s) after joining.
    Type: Application
    Filed: June 7, 2006
    Publication date: December 28, 2006
    Inventors: Eric Beyne, Riet Labie
  • Patent number: 6908856
    Abstract: The invention relates to a method for the fabrication of a device comprising electrical through hole interconnects. In one embodiment, the method comprises anisotropical dry etching of a patternable dielectric material within a substrate hole. One aspect of the invention provides a novel method for producing via or through hole interconnects between microelectronic elements, which is relatively easy to perform and can be applied relatively cheaply compared to the state of the art. The method should, for instance, be applicable in thin chip technology as MCM (Multi Chip Module) and system in a package (SIP) technology.
    Type: Grant
    Filed: April 2, 2004
    Date of Patent: June 21, 2005
    Assignee: Interuniversitair Microelektronica Centrum (IMEC)
    Inventors: Eric Beyne, Riet Labie
  • Publication number: 20040259292
    Abstract: The invention relates to a method for the fabrication of a device comprising electrical through hole interconnects. In one embodiment, the method comprises anisotropical dry etching of a patternable dielectric material within a substrate hole. One aspect of the invention provides a novel method for producing via or through hole interconnects between microelectronic elements, which is relatively easy to perform and can be applied relatively cheaply compared to the state of the art. The method should, for instance, be applicable in thin chip technology as MCM (Multi Chip Module) and system in a package (SIP) technology.
    Type: Application
    Filed: April 2, 2004
    Publication date: December 23, 2004
    Inventors: Eric Beyne, Riet Labie