Abstract: A process for producing a semiconductor arrangement having elemental semiconductor units or devices monolithically integrated in a semiconductor body with the units having one or a plurality of common zones of one conductivity type with locally reduced thickness and pn-junctions between zones of different conductivity types. A groove is formed, by etching, in one major surface of the semiconductor body in the portion thereof above the region corresponding to the device which is to have the zone of reduced thickness with the depth of the groove being determined by the intended reduction in thickness of the common zone of the completed arrangement.

Abstract: A soldering jig made of plastic.

Abstract: An electrode centering and clamping device for producing diffused, contacted and surface passivated semiconductor chips for semiconductor devices, wherein after producing a semiconductor wafer with a given arrangement of layers and regions of different conductance and different conductivity types for a plurality of devices by doping with impurity forming elements, both of the major surfaces of the semiconductor wafer are provided with respective metal layers and output electrodes are applied to both of the metal layers for the plurality of devices with the output electrodes being of such a thickness and overlying such areas of the metal layers so that the thickness of the electrodes will still be sufficient for further processing after a subsequent separation of the wafer into the plurality of chips and the major surfaces of the chips after separation, are completely covered by the output electrodes.

Abstract: A method for producing diffused, contacted and surface passivated semiconductor chips for semiconductor devices, wherein after producing a semiconductor wafer with a given arrangement of layers and regions of different conductance and different conductivity types for a plurality of devices by doping with impurity forming elements, both of the major surfaces of the semiconductor wafer are provided with respective metal layers and output electrodes are applied to both of the metal layers for the plurality of devices with the output electrodes being of such a thickness and overlying such areas of the metal layers so that the thickness of the electrodes will still be sufficient for further processing after a subsequent separation of the wafer into the plurality of chips and the major surfaces of the chips after separation, are completely covered by the output electrodes.