Patents by Inventor Rigor Hendrikus Lambertus van der Heijden

Rigor Hendrikus Lambertus van der Heijden has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230370243
    Abstract: The disclosure relates to a coding module for an Ethernet transceiver. The coding module may include circuitry configured to: receive data-signaling representative of one or more data words; encode the data-signaling into one or more DC-balanced words each having a DC-balanced-word-length; provide a prepended-word for a first transmission, where a length of the prepended-word is at least as long as the DC-balanced-word-length; and provide the one or more DC-balanced words for a second transmission, where the second transmission is subsequent to the first transmission. The coding module may include circuitry configured to: receive a prepended-word and provide a logic-high signal to an Energy Detect terminal; receive one or more DC-balanced words each having a DC-balanced-word-length; remove a DC-balanced coding from the one or more DC-balanced words to generate data signaling representative of one or more data words; and provide the data signaling to an output terminal.
    Type: Application
    Filed: April 28, 2023
    Publication date: November 16, 2023
    Inventors: Bernd Uwe Gerhard Elend, Gerrit Willem den Besten, Rigor Hendrikus Lambertus van der Heijden
  • Publication number: 20230179225
    Abstract: An apparatus comprising an encoder is configured to: detect a first edge in the input signal and, in response, provide a pulse generation sequence comprising the encoder being configured to: generate, in the output signal, a first pulse, wherein the first pulse is provided over first and second minimum time periods irrespective of an edge subsequent the first edge being present in the input signal; and obtain a first sample of the input signal; and obtain a second sample at an end of the first pulse; and if the first sample and the second sample are indicative of different voltage levels, generate a second pulse; or if the first and second sample and the same maintain the voltage level in the output signal.
    Type: Application
    Filed: November 14, 2022
    Publication date: June 8, 2023
    Inventors: Clemens Gerhardus Johannes de Haas, Rigor Hendrikus Lambertus van der Heijden